diff options
Diffstat (limited to 'test/CodeGen/X86')
47 files changed, 55 insertions, 55 deletions
diff --git a/test/CodeGen/X86/2006-07-20-InlineAsm.ll b/test/CodeGen/X86/2006-07-20-InlineAsm.ll index cac47cdab6..1facf15b9f 100644 --- a/test/CodeGen/X86/2006-07-20-InlineAsm.ll +++ b/test/CodeGen/X86/2006-07-20-InlineAsm.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 +; RUN: llc < %s -march=x86 -no-integrated-as ; PR833 @G = weak global i32 0 ; <i32*> [#uses=3] diff --git a/test/CodeGen/X86/2006-07-31-SingleRegClass.ll b/test/CodeGen/X86/2006-07-31-SingleRegClass.ll index c4b08a3be2..2a9c8324d3 100644 --- a/test/CodeGen/X86/2006-07-31-SingleRegClass.ll +++ b/test/CodeGen/X86/2006-07-31-SingleRegClass.ll @@ -1,5 +1,5 @@ ; PR850 -; RUN: llc < %s -march=x86 -x86-asm-syntax=att | FileCheck %s +; RUN: llc < %s -march=x86 -x86-asm-syntax=att -no-integrated-as | FileCheck %s ; CHECK: {{movl 4[(]%eax[)],%ebp}} ; CHECK: {{movl 0[(]%eax[)], %ebx}} diff --git a/test/CodeGen/X86/2007-03-24-InlineAsmPModifier.ll b/test/CodeGen/X86/2007-03-24-InlineAsmPModifier.ll index 3b2e443d7d..93fb344cbb 100644 --- a/test/CodeGen/X86/2007-03-24-InlineAsmPModifier.ll +++ b/test/CodeGen/X86/2007-03-24-InlineAsmPModifier.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 | grep "mov %gs:72, %eax" +; RUN: llc < %s -march=x86 -no-integrated-as | grep "mov %gs:72, %eax" target datalayout = "e-p:32:32" target triple = "i686-apple-darwin9" diff --git a/test/CodeGen/X86/2007-03-24-InlineAsmVectorOp.ll b/test/CodeGen/X86/2007-03-24-InlineAsmVectorOp.ll index 366f583039..6cf8bf9061 100644 --- a/test/CodeGen/X86/2007-03-24-InlineAsmVectorOp.ll +++ b/test/CodeGen/X86/2007-03-24-InlineAsmVectorOp.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -mcpu=yonah -march=x86 | FileCheck %s +; RUN: llc < %s -mcpu=yonah -march=x86 -no-integrated-as | FileCheck %s target datalayout = "e-p:32:32" target triple = "i686-apple-darwin9" diff --git a/test/CodeGen/X86/2007-10-28-inlineasm-q-modifier.ll b/test/CodeGen/X86/2007-10-28-inlineasm-q-modifier.ll index 984094d86a..d02346d103 100644 --- a/test/CodeGen/X86/2007-10-28-inlineasm-q-modifier.ll +++ b/test/CodeGen/X86/2007-10-28-inlineasm-q-modifier.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s +; RUN: llc -no-integrated-as < %s ; PR1748 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128" target triple = "x86_64-unknown-linux-gnu" diff --git a/test/CodeGen/X86/2007-11-04-LiveVariablesBug.ll b/test/CodeGen/X86/2007-11-04-LiveVariablesBug.ll index 6b871aa3a4..ec3bce9c66 100644 --- a/test/CodeGen/X86/2007-11-04-LiveVariablesBug.ll +++ b/test/CodeGen/X86/2007-11-04-LiveVariablesBug.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu +; RUN: llc -no-integrated-as < %s -mtriple=x86_64-unknown-linux-gnu ; PR1767 define void @xor_sse_2(i64 %bytes, i64* %p1, i64* %p2) { diff --git a/test/CodeGen/X86/2007-11-04-rip-immediate-constant.ll b/test/CodeGen/X86/2007-11-04-rip-immediate-constant.ll index c4670242b5..d1699d5571 100644 --- a/test/CodeGen/X86/2007-11-04-rip-immediate-constant.ll +++ b/test/CodeGen/X86/2007-11-04-rip-immediate-constant.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -relocation-model=static | FileCheck %s +; RUN: llc < %s -relocation-model=static -no-integrated-as | FileCheck %s ; PR1761 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128" target triple = "x86_64-pc-linux" diff --git a/test/CodeGen/X86/2008-02-20-InlineAsmClobber.ll b/test/CodeGen/X86/2008-02-20-InlineAsmClobber.ll index b06b249a63..319e884139 100644 --- a/test/CodeGen/X86/2008-02-20-InlineAsmClobber.ll +++ b/test/CodeGen/X86/2008-02-20-InlineAsmClobber.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s | FileCheck %s +; RUN: llc -no-integrated-as < %s | FileCheck %s ; PR2078 ; The clobber list says that "ax" is clobbered. Make sure that eax isn't ; allocated to the input/output register. diff --git a/test/CodeGen/X86/2008-02-26-AsmDirectMemOp.ll b/test/CodeGen/X86/2008-02-26-AsmDirectMemOp.ll index 0b4eb3a3b9..11b55a6e5a 100644 --- a/test/CodeGen/X86/2008-02-26-AsmDirectMemOp.ll +++ b/test/CodeGen/X86/2008-02-26-AsmDirectMemOp.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 +; RUN: llc < %s -march=x86 -no-integrated-as target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32" target triple = "i386-pc-linux-gnu" diff --git a/test/CodeGen/X86/2008-04-26-Asm-Optimize-Imm.ll b/test/CodeGen/X86/2008-04-26-Asm-Optimize-Imm.ll index d4805b4bb6..6d45f1f003 100644 --- a/test/CodeGen/X86/2008-04-26-Asm-Optimize-Imm.ll +++ b/test/CodeGen/X86/2008-04-26-Asm-Optimize-Imm.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s | FileCheck %s +; RUN: llc -no-integrated-as < %s | FileCheck %s ; rdar://5720231 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" target triple = "i386-apple-darwin8" diff --git a/test/CodeGen/X86/2008-09-18-inline-asm-2.ll b/test/CodeGen/X86/2008-09-18-inline-asm-2.ll index 5c2fbeee5c..f4a43a1e97 100644 --- a/test/CodeGen/X86/2008-09-18-inline-asm-2.ll +++ b/test/CodeGen/X86/2008-09-18-inline-asm-2.ll @@ -1,6 +1,6 @@ -; RUN: llc < %s -march=x86 -regalloc=fast -optimize-regalloc=0 | FileCheck %s -; RUN: llc < %s -march=x86 -regalloc=basic | FileCheck %s -; RUN: llc < %s -march=x86 -regalloc=greedy | FileCheck %s +; RUN: llc < %s -march=x86 -regalloc=fast -optimize-regalloc=0 -no-integrated-as | FileCheck %s +; RUN: llc < %s -march=x86 -regalloc=basic -no-integrated-as | FileCheck %s +; RUN: llc < %s -march=x86 -regalloc=greedy -no-integrated-as | FileCheck %s ; The 1st, 2nd, 3rd and 5th registers must all be different. The registers ; referenced in the 4th and 6th operands must not be the same as the 1st or 5th diff --git a/test/CodeGen/X86/2008-10-17-Asm64bitRConstraint.ll b/test/CodeGen/X86/2008-10-17-Asm64bitRConstraint.ll index b2e6061ff9..2b2f704349 100644 --- a/test/CodeGen/X86/2008-10-17-Asm64bitRConstraint.ll +++ b/test/CodeGen/X86/2008-10-17-Asm64bitRConstraint.ll @@ -1,5 +1,5 @@ -; RUN: llc < %s -march=x86 -; RUN: llc < %s -march=x86-64 +; RUN: llc < %s -march=x86 -no-integrated-as +; RUN: llc < %s -march=x86-64 -no-integrated-as define void @test(i64 %x) nounwind { entry: diff --git a/test/CodeGen/X86/2008-10-20-AsmDoubleInI32.ll b/test/CodeGen/X86/2008-10-20-AsmDoubleInI32.ll index 353d1c7521..e23dfe5a6a 100644 --- a/test/CodeGen/X86/2008-10-20-AsmDoubleInI32.ll +++ b/test/CodeGen/X86/2008-10-20-AsmDoubleInI32.ll @@ -1,5 +1,5 @@ -; RUN: llc < %s -march=x86 -; RUN: llc < %s -march=x86-64 +; RUN: llc < %s -march=x86 -no-integrated-as +; RUN: llc < %s -march=x86-64 -no-integrated-as ; from gcc.c-torture/compile/920520-1.c diff --git a/test/CodeGen/X86/2009-02-12-InlineAsm-nieZ-constraints.ll b/test/CodeGen/X86/2009-02-12-InlineAsm-nieZ-constraints.ll index 75496518af..5004f04bf8 100644 --- a/test/CodeGen/X86/2009-02-12-InlineAsm-nieZ-constraints.ll +++ b/test/CodeGen/X86/2009-02-12-InlineAsm-nieZ-constraints.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 | FileCheck %s +; RUN: llc < %s -march=x86 -no-integrated-as | FileCheck %s ; ModuleID = 'shant.c' target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" diff --git a/test/CodeGen/X86/2009-04-13-2AddrAssert-2.ll b/test/CodeGen/X86/2009-04-13-2AddrAssert-2.ll index 3d70b58686..bd1b47a588 100644 --- a/test/CodeGen/X86/2009-04-13-2AddrAssert-2.ll +++ b/test/CodeGen/X86/2009-04-13-2AddrAssert-2.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -mtriple=i386-apple-darwin +; RUN: llc < %s -mtriple=i386-apple-darwin -no-integrated-as ; rdar://6781755 ; PR3934 diff --git a/test/CodeGen/X86/2009-05-08-InlineAsmIOffset.ll b/test/CodeGen/X86/2009-05-08-InlineAsmIOffset.ll index 7468acb95f..fa240f64c3 100644 --- a/test/CodeGen/X86/2009-05-08-InlineAsmIOffset.ll +++ b/test/CodeGen/X86/2009-05-08-InlineAsmIOffset.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -relocation-model=static | FileCheck %s +; RUN: llc < %s -relocation-model=static -no-integrated-as | FileCheck %s ; PR4152 ; CHECK: {{1: ._pv_cpu_ops[+]8}} diff --git a/test/CodeGen/X86/2009-09-19-earlyclobber.ll b/test/CodeGen/X86/2009-09-19-earlyclobber.ll index 66f5118050..7df62fd8c3 100644 --- a/test/CodeGen/X86/2009-09-19-earlyclobber.ll +++ b/test/CodeGen/X86/2009-09-19-earlyclobber.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s | FileCheck %s +; RUN: llc -no-integrated-as < %s | FileCheck %s ; ModuleID = '4964.c' ; PR 4964 ; Registers other than RAX, RCX are OK, but they must be different. diff --git a/test/CodeGen/X86/2009-12-01-EarlyClobberBug.ll b/test/CodeGen/X86/2009-12-01-EarlyClobberBug.ll index b166447055..5c10c55ea3 100644 --- a/test/CodeGen/X86/2009-12-01-EarlyClobberBug.ll +++ b/test/CodeGen/X86/2009-12-01-EarlyClobberBug.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -mtriple=x86_64-apple-darwin | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-apple-darwin -no-integrated-as | FileCheck %s ; pr5391 define void @t() nounwind ssp { diff --git a/test/CodeGen/X86/2010-05-05-LocalAllocEarlyClobber.ll b/test/CodeGen/X86/2010-05-05-LocalAllocEarlyClobber.ll index 74a5ec28db..fc8c895af5 100644 --- a/test/CodeGen/X86/2010-05-05-LocalAllocEarlyClobber.ll +++ b/test/CodeGen/X86/2010-05-05-LocalAllocEarlyClobber.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -O0 -regalloc=fast | FileCheck %s +; RUN: llc < %s -O0 -regalloc=fast -no-integrated-as | FileCheck %s ; PR6520 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128-n8:16:32" diff --git a/test/CodeGen/X86/2010-06-15-FastAllocEarlyCLobber.ll b/test/CodeGen/X86/2010-06-15-FastAllocEarlyCLobber.ll index 9b47bb75bf..0f8855d126 100644 --- a/test/CodeGen/X86/2010-06-15-FastAllocEarlyCLobber.ll +++ b/test/CodeGen/X86/2010-06-15-FastAllocEarlyCLobber.ll @@ -1,4 +1,4 @@ -; RUN: llc -regalloc=fast -optimize-regalloc=0 < %s | FileCheck %s +; RUN: llc -regalloc=fast -optimize-regalloc=0 -no-integrated-as < %s | FileCheck %s ; PR7382 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64" target triple = "x86_64-unknown-linux-gnu" diff --git a/test/CodeGen/X86/2010-06-25-asm-RA-crash.ll b/test/CodeGen/X86/2010-06-25-asm-RA-crash.ll index 68a6a134de..0df9dc1cb7 100644 --- a/test/CodeGen/X86/2010-06-25-asm-RA-crash.ll +++ b/test/CodeGen/X86/2010-06-25-asm-RA-crash.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -disable-fp-elim -mtriple=i686-pc-mingw32 +; RUN: llc < %s -disable-fp-elim -mtriple=i686-pc-mingw32 -no-integrated-as %struct.__SEH2Frame = type {} diff --git a/test/CodeGen/X86/2010-06-28-FastAllocTiedOperand.ll b/test/CodeGen/X86/2010-06-28-FastAllocTiedOperand.ll index e1491a03d8..d7bc21f639 100644 --- a/test/CodeGen/X86/2010-06-28-FastAllocTiedOperand.ll +++ b/test/CodeGen/X86/2010-06-28-FastAllocTiedOperand.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -O0 | FileCheck %s +; RUN: llc < %s -march=x86 -O0 -no-integrated-as | FileCheck %s ; PR7509 target triple = "i386-apple-darwin10" %asmtype = type { i32, i8*, i32, i32 } diff --git a/test/CodeGen/X86/2010-06-28-matched-g-constraint.ll b/test/CodeGen/X86/2010-06-28-matched-g-constraint.ll index 82dac9d993..a0798ae10d 100644 --- a/test/CodeGen/X86/2010-06-28-matched-g-constraint.ll +++ b/test/CodeGen/X86/2010-06-28-matched-g-constraint.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -mtriple=x86_64-apple-darwin11 | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-apple-darwin11 -no-integrated-as | FileCheck %s ; Any register is OK for %0, but it must be a register, not memory. define i32 @foo() nounwind ssp { diff --git a/test/CodeGen/X86/2010-07-02-asm-alignstack.ll b/test/CodeGen/X86/2010-07-02-asm-alignstack.ll index 0bbb24f6ec..4302adda51 100644 --- a/test/CodeGen/X86/2010-07-02-asm-alignstack.ll +++ b/test/CodeGen/X86/2010-07-02-asm-alignstack.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -mtriple=x86_64-apple-darwin10 | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-apple-darwin10 -no-integrated-as | FileCheck %s define void @foo() nounwind ssp { entry: diff --git a/test/CodeGen/X86/2010-07-06-asm-RIP.ll b/test/CodeGen/X86/2010-07-06-asm-RIP.ll index 9526b8d4cd..818bbc6a5b 100644 --- a/test/CodeGen/X86/2010-07-06-asm-RIP.ll +++ b/test/CodeGen/X86/2010-07-06-asm-RIP.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -mtriple=x86_64-apple-darwin | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-apple-darwin -no-integrated-as | FileCheck %s ; PR 4752 @n = global i32 0 ; <i32*> [#uses=2] diff --git a/test/CodeGen/X86/2010-07-13-indirectXconstraint.ll b/test/CodeGen/X86/2010-07-13-indirectXconstraint.ll index 97cbe3ea5a..306e22ae5f 100644 --- a/test/CodeGen/X86/2010-07-13-indirectXconstraint.ll +++ b/test/CodeGen/X86/2010-07-13-indirectXconstraint.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -mtriple=x86_64-apple-darwin | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-apple-darwin -no-integrated-as | FileCheck %s ; PR 7528 ; formerly crashed diff --git a/test/CodeGen/X86/2011-10-11-SpillDead.ll b/test/CodeGen/X86/2011-10-11-SpillDead.ll index 8e70d6543a..19c3d6ca72 100644 --- a/test/CodeGen/X86/2011-10-11-SpillDead.ll +++ b/test/CodeGen/X86/2011-10-11-SpillDead.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -verify-regalloc +; RUN: llc < %s -verify-regalloc -no-integrated-as ; PR11125 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128" target triple = "x86_64-apple-macosx10.7" diff --git a/test/CodeGen/X86/asm-block-labels.ll b/test/CodeGen/X86/asm-block-labels.ll index a43d430231..6dbfb16a6d 100644 --- a/test/CodeGen/X86/asm-block-labels.ll +++ b/test/CodeGen/X86/asm-block-labels.ll @@ -1,4 +1,4 @@ -; RUN: opt < %s -std-compile-opts | llc +; RUN: opt < %s -std-compile-opts | llc -no-integrated-as ; ModuleID = 'block12.c' target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" target triple = "i686-apple-darwin8" diff --git a/test/CodeGen/X86/asm-global-imm.ll b/test/CodeGen/X86/asm-global-imm.ll index ebf585a39a..9e79f6f782 100644 --- a/test/CodeGen/X86/asm-global-imm.ll +++ b/test/CodeGen/X86/asm-global-imm.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -relocation-model=static | FileCheck %s +; RUN: llc < %s -march=x86 -relocation-model=static -no-integrated-as | FileCheck %s ; PR882 target datalayout = "e-p:32:32" diff --git a/test/CodeGen/X86/cas.ll b/test/CodeGen/X86/cas.ll index c2dd05ef73..ec519c646f 100644 --- a/test/CodeGen/X86/cas.ll +++ b/test/CodeGen/X86/cas.ll @@ -1,4 +1,4 @@ -; RUN: llc -mtriple=x86_64-pc-linux-gnu %s -o - | FileCheck %s +; RUN: llc -mtriple=x86_64-pc-linux-gnu %s -o - -no-integrated-as | FileCheck %s ; C code this came from ;bool cas(float volatile *p, float *expected, float desired) { diff --git a/test/CodeGen/X86/fast-isel.ll b/test/CodeGen/X86/fast-isel.ll index 132df2b0ab..bc79184216 100644 --- a/test/CodeGen/X86/fast-isel.ll +++ b/test/CodeGen/X86/fast-isel.ll @@ -1,5 +1,5 @@ -; RUN: llc < %s -fast-isel -fast-isel-abort -verify-machineinstrs -march=x86 -mattr=sse2 -; RUN: llc < %s -fast-isel -fast-isel-abort -verify-machineinstrs -mtriple=x86_64-apple-darwin10 +; RUN: llc < %s -fast-isel -fast-isel-abort -verify-machineinstrs -march=x86 -mattr=sse2 -no-integrated-as +; RUN: llc < %s -fast-isel -fast-isel-abort -verify-machineinstrs -mtriple=x86_64-apple-darwin10 -no-integrated-as ; This tests very minimal fast-isel functionality. diff --git a/test/CodeGen/X86/fold-xmm-zero.ll b/test/CodeGen/X86/fold-xmm-zero.ll index b4eeb40983..c92d45c35a 100644 --- a/test/CodeGen/X86/fold-xmm-zero.ll +++ b/test/CodeGen/X86/fold-xmm-zero.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -mtriple=i386-apple-macosx10.6.7 -mattr=+sse2 | FileCheck %s +; RUN: llc < %s -mtriple=i386-apple-macosx10.6.7 -mattr=+sse2 -no-integrated-as | FileCheck %s ; Simple test to make sure folding for special constants (like float zero) ; isn't completely broken. diff --git a/test/CodeGen/X86/inline-asm-flag-clobber.ll b/test/CodeGen/X86/inline-asm-flag-clobber.ll index 45f4d2f38a..bb7c33e422 100644 --- a/test/CodeGen/X86/inline-asm-flag-clobber.ll +++ b/test/CodeGen/X86/inline-asm-flag-clobber.ll @@ -1,4 +1,4 @@ -; RUN: llc -march=x86-64 < %s | FileCheck %s +; RUN: llc -march=x86-64 -no-integrated-as < %s | FileCheck %s ; PR3701 define i64 @t(i64* %arg) nounwind { diff --git a/test/CodeGen/X86/inline-asm-fpstack.ll b/test/CodeGen/X86/inline-asm-fpstack.ll index e83c065632..91c477baaa 100644 --- a/test/CodeGen/X86/inline-asm-fpstack.ll +++ b/test/CodeGen/X86/inline-asm-fpstack.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -mcpu=generic -mtriple=i386-apple-darwin | FileCheck %s +; RUN: llc < %s -mcpu=generic -mtriple=i386-apple-darwin -no-integrated-as | FileCheck %s ; There should be no stack manipulations between the inline asm and ret. ; CHECK: test1 diff --git a/test/CodeGen/X86/inline-asm-h.ll b/test/CodeGen/X86/inline-asm-h.ll index 53cf419bd1..8c3e45aba9 100644 --- a/test/CodeGen/X86/inline-asm-h.ll +++ b/test/CodeGen/X86/inline-asm-h.ll @@ -9,4 +9,4 @@ entry: } ; CHECK: zed -; CHECK: movq %mm2,foobar+8(%rip) +; CHECK: movq %mm2, foobar+8(%rip) diff --git a/test/CodeGen/X86/inline-asm-modifier-n.ll b/test/CodeGen/X86/inline-asm-modifier-n.ll index b069c46318..072c7c4195 100644 --- a/test/CodeGen/X86/inline-asm-modifier-n.ll +++ b/test/CodeGen/X86/inline-asm-modifier-n.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 | grep " 37" +; RUN: llc < %s -march=x86 -no-integrated-as | grep " 37" ; rdar://7008959 define void @bork() nounwind { diff --git a/test/CodeGen/X86/inline-asm-mrv.ll b/test/CodeGen/X86/inline-asm-mrv.ll index 733205d6a9..a96e7b8180 100644 --- a/test/CodeGen/X86/inline-asm-mrv.ll +++ b/test/CodeGen/X86/inline-asm-mrv.ll @@ -1,8 +1,8 @@ ; PR2094 -; RUN: llc < %s -march=x86-64 | grep movslq -; RUN: llc < %s -march=x86-64 | grep addps -; RUN: llc < %s -march=x86-64 | grep paddd -; RUN: llc < %s -march=x86-64 | not grep movq +; RUN: llc < %s -march=x86-64 -no-integrated-as | grep movslq +; RUN: llc < %s -march=x86-64 -no-integrated-as | grep addps +; RUN: llc < %s -march=x86-64 -no-integrated-as | grep paddd +; RUN: llc < %s -march=x86-64 -no-integrated-as | not grep movq target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128" target triple = "x86_64-apple-darwin8" diff --git a/test/CodeGen/X86/inline-asm-q-regs.ll b/test/CodeGen/X86/inline-asm-q-regs.ll index fca68baac6..53a56aee2c 100644 --- a/test/CodeGen/X86/inline-asm-q-regs.ll +++ b/test/CodeGen/X86/inline-asm-q-regs.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 -mattr=+avx +; RUN: llc < %s -march=x86-64 -mattr=+avx -no-integrated-as ; rdar://7066579 %0 = type { i64, i64, i64, i64, i64 } ; type %0 diff --git a/test/CodeGen/X86/inline-asm-stack-realign3.ll b/test/CodeGen/X86/inline-asm-stack-realign3.ll index cdb77ca3ea..3baaaaa7d9 100644 --- a/test/CodeGen/X86/inline-asm-stack-realign3.ll +++ b/test/CodeGen/X86/inline-asm-stack-realign3.ll @@ -1,4 +1,4 @@ -; RUN: llc -march=x86 < %s | FileCheck %s +; RUN: llc -march=x86 -no-integrated-as < %s | FileCheck %s declare void @bar(i32* %junk) diff --git a/test/CodeGen/X86/inline-asm-tied.ll b/test/CodeGen/X86/inline-asm-tied.ll index 597236e362..fb5896b0ad 100644 --- a/test/CodeGen/X86/inline-asm-tied.ll +++ b/test/CodeGen/X86/inline-asm-tied.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -mtriple=i386-apple-darwin9 -O0 -optimize-regalloc -regalloc=basic | FileCheck %s +; RUN: llc < %s -mtriple=i386-apple-darwin9 -O0 -optimize-regalloc -regalloc=basic -no-integrated-as | FileCheck %s ; rdar://6992609 ; CHECK: movl [[EDX:%e..]], 4(%esp) diff --git a/test/CodeGen/X86/inline-asm-x-scalar.ll b/test/CodeGen/X86/inline-asm-x-scalar.ll index 5a9628b3df..64a7fe8264 100644 --- a/test/CodeGen/X86/inline-asm-x-scalar.ll +++ b/test/CodeGen/X86/inline-asm-x-scalar.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mcpu=yonah +; RUN: llc < %s -march=x86 -mcpu=yonah -no-integrated-as define void @test1() { tail call void asm sideeffect "ucomiss $0", "x"( float 0x41E0000000000000) diff --git a/test/CodeGen/X86/inline-asm.ll b/test/CodeGen/X86/inline-asm.ll index f12c2600ff..5ec4f469df 100644 --- a/test/CodeGen/X86/inline-asm.ll +++ b/test/CodeGen/X86/inline-asm.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 +; RUN: llc < %s -march=x86 -no-integrated-as define i32 @test1() nounwind { ; Dest is AX, dest type = i32. diff --git a/test/CodeGen/X86/ms-inline-asm.ll b/test/CodeGen/X86/ms-inline-asm.ll index 436d34a115..6910515890 100644 --- a/test/CodeGen/X86/ms-inline-asm.ll +++ b/test/CodeGen/X86/ms-inline-asm.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mcpu=core2 | FileCheck %s +; RUN: llc < %s -march=x86 -mcpu=core2 -no-integrated-as | FileCheck %s define i32 @t1() nounwind { entry: diff --git a/test/CodeGen/X86/mult-alt-generic-i686.ll b/test/CodeGen/X86/mult-alt-generic-i686.ll index 7c3499f178..54bc3a42f0 100644 --- a/test/CodeGen/X86/mult-alt-generic-i686.ll +++ b/test/CodeGen/X86/mult-alt-generic-i686.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 +; RUN: llc < %s -march=x86 -no-integrated-as ; ModuleID = 'mult-alt-generic.c' target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32-n8:16:32" target triple = "i686" diff --git a/test/CodeGen/X86/mult-alt-generic-x86_64.ll b/test/CodeGen/X86/mult-alt-generic-x86_64.ll index f35bb5e340..84a9c81409 100644 --- a/test/CodeGen/X86/mult-alt-generic-x86_64.ll +++ b/test/CodeGen/X86/mult-alt-generic-x86_64.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 +; RUN: llc < %s -march=x86-64 -no-integrated-as ; ModuleID = 'mult-alt-generic.c' target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64" target triple = "x86_64" diff --git a/test/CodeGen/X86/mult-alt-x86.ll b/test/CodeGen/X86/mult-alt-x86.ll index 06175da464..cb2219a6ed 100644 --- a/test/CodeGen/X86/mult-alt-x86.ll +++ b/test/CodeGen/X86/mult-alt-x86.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mattr=+sse2 +; RUN: llc < %s -march=x86 -mattr=+sse2 -no-integrated-as ; ModuleID = 'mult-alt-x86.c' target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f80:128:128-v64:64:64-v128:128:128-a0:0:64-f80:32:32-n8:16:32" target triple = "i686-pc-win32" diff --git a/test/CodeGen/X86/multiple-loop-post-inc.ll b/test/CodeGen/X86/multiple-loop-post-inc.ll index 29b9f34464..4edc1ff0b3 100644 --- a/test/CodeGen/X86/multiple-loop-post-inc.ll +++ b/test/CodeGen/X86/multiple-loop-post-inc.ll @@ -1,4 +1,4 @@ -; RUN: llc -asm-verbose=false -disable-branch-fold -disable-block-placement -disable-tail-duplicate -march=x86-64 -mcpu=nehalem < %s | FileCheck %s +; RUN: llc -asm-verbose=false -disable-branch-fold -disable-block-placement -disable-tail-duplicate -march=x86-64 -mcpu=nehalem -no-integrated-as < %s | FileCheck %s ; rdar://7236213 ; ; The scheduler's 2-address hack has been disabled, so there is |