diff options
Diffstat (limited to 'test/CodeGen')
-rw-r--r-- | test/CodeGen/Hexagon/pred-gp.ll | 28 | ||||
-rw-r--r-- | test/CodeGen/Mips/mips16_fpret.ll | 77 | ||||
-rw-r--r-- | test/CodeGen/X86/xor.ll | 11 |
3 files changed, 116 insertions, 0 deletions
diff --git a/test/CodeGen/Hexagon/pred-gp.ll b/test/CodeGen/Hexagon/pred-gp.ll new file mode 100644 index 0000000000..299bd8679d --- /dev/null +++ b/test/CodeGen/Hexagon/pred-gp.ll @@ -0,0 +1,28 @@ +; RUN: llc -march=hexagon -mcpu=hexagonv4 < %s | FileCheck %s +; Check that we are able to predicate instructions with gp-relative +; addressing mode. + +@d = external global i32 +@c = common global i32 0, align 4 + +; Function Attrs: nounwind +define i32 @test2(i8 zeroext %a, i8 zeroext %b) #0 { +; CHECK: if{{ *}}({{!*}}p{{[0-3]+}}{{[.new]*}}){{ *}}r{{[0-9]+}}{{ *}}={{ *}}memw(##{{[cd]}}) +; CHECK: if{{ *}}({{!*}}p{{[0-3]+}}){{ *}}r{{[0-9]+}}{{ *}}={{ *}}memw(##{{[cd]}}) +entry: + %cmp = icmp eq i8 %a, %b + br i1 %cmp, label %if.then, label %entry.if.end_crit_edge + +entry.if.end_crit_edge: + %.pre = load i32* @c, align 4 + br label %if.end + +if.then: + %0 = load i32* @d, align 4 + store i32 %0, i32* @c, align 4 + br label %if.end + +if.end: + %1 = phi i32 [ %.pre, %entry.if.end_crit_edge ], [ %0, %if.then ] + ret i32 %1 +} diff --git a/test/CodeGen/Mips/mips16_fpret.ll b/test/CodeGen/Mips/mips16_fpret.ll new file mode 100644 index 0000000000..9113329396 --- /dev/null +++ b/test/CodeGen/Mips/mips16_fpret.ll @@ -0,0 +1,77 @@ +; RUN: llc -mtriple=mipsel-linux-gnu -march=mipsel -mcpu=mips16 -soft-float -mips16-hard-float -relocation-model=static < %s | FileCheck %s -check-prefix=1 +; RUN: llc -mtriple=mipsel-linux-gnu -march=mipsel -mcpu=mips16 -soft-float -mips16-hard-float -relocation-model=static < %s | FileCheck %s -check-prefix=2 +; RUN: llc -mtriple=mipsel-linux-gnu -march=mipsel -mcpu=mips16 -soft-float -mips16-hard-float -relocation-model=static < %s | FileCheck %s -check-prefix=3 +; RUN: llc -mtriple=mipsel-linux-gnu -march=mipsel -mcpu=mips16 -soft-float -mips16-hard-float -relocation-model=static < %s | FileCheck %s -check-prefix=4 + + +@x = global float 0x41F487E980000000, align 4 +@dx = global double 0x41CDCC8BC4800000, align 8 +@cx = global { float, float } { float 1.000000e+00, float 9.900000e+01 }, align 4 +@dcx = global { double, double } { double 0x42CE5E14A412B480, double 0x423AA4C580DB0000 }, align 8 + +define float @foox() { +entry: + %0 = load float* @x, align 4 + ret float %0 +; 1: .ent foox +; 1: lw $2, %lo(x)(${{[0-9]+}}) +; 1: jal __mips16_ret_sf +} + +define double @foodx() { +entry: + %0 = load double* @dx, align 8 + ret double %0 +; 1: .ent foodx +; 1: lw $2, %lo(dx)(${{[0-9]+}}) +; 1: jal __mips16_ret_df +; 2: .ent foodx +; 2: lw $3, 4(${{[0-9]+}}) +; 2: jal __mips16_ret_df + +} + +define { float, float } @foocx() { +entry: + %retval = alloca { float, float }, align 4 + %cx.real = load float* getelementptr inbounds ({ float, float }* @cx, i32 0, i32 0) + %cx.imag = load float* getelementptr inbounds ({ float, float }* @cx, i32 0, i32 1) + %real = getelementptr inbounds { float, float }* %retval, i32 0, i32 0 + %imag = getelementptr inbounds { float, float }* %retval, i32 0, i32 1 + store float %cx.real, float* %real + store float %cx.imag, float* %imag + %0 = load { float, float }* %retval + ret { float, float } %0 +; 1: .ent foocx +; 1: lw $2, %lo(cx)(${{[0-9]+}}) +; 1: jal __mips16_ret_sc +; 2: .ent foocx +; 2: lw $3, 4(${{[0-9]+}}) +; 2: jal __mips16_ret_sc +} + +define { double, double } @foodcx() { +entry: + %retval = alloca { double, double }, align 8 + %dcx.real = load double* getelementptr inbounds ({ double, double }* @dcx, i32 0, i32 0) + %dcx.imag = load double* getelementptr inbounds ({ double, double }* @dcx, i32 0, i32 1) + %real = getelementptr inbounds { double, double }* %retval, i32 0, i32 0 + %imag = getelementptr inbounds { double, double }* %retval, i32 0, i32 1 + store double %dcx.real, double* %real + store double %dcx.imag, double* %imag + %0 = load { double, double }* %retval + ret { double, double } %0 +; 1: .ent foodcx +; 1: lw $2, %lo(dcx)(${{[0-9]+}}) +; 1: jal __mips16_ret_dc +; 2: .ent foodcx +; 2: lw $3, 4(${{[0-9]+}}) +; 2: jal __mips16_ret_dc +; 3: .ent foodcx +; 3: lw $4, 8(${{[0-9]+}}) +; 3: jal __mips16_ret_dc +; 4: .ent foodcx +; 4: lw $5, 12(${{[0-9]+}}) +; 4: jal __mips16_ret_dc +} + diff --git a/test/CodeGen/X86/xor.ll b/test/CodeGen/X86/xor.ll index 2408bfe72c..574bb7817e 100644 --- a/test/CodeGen/X86/xor.ll +++ b/test/CodeGen/X86/xor.ll @@ -154,3 +154,14 @@ define i32 @test9(i32 %a) nounwind { ; X32: notl [[REG:%[a-z]+]] ; X32: andl {{.*}}[[REG:%[a-z]+]] } + +; PR15948 +define <4 x i32> @test10(<4 x i32> %a) nounwind { + %1 = and <4 x i32> %a, <i32 4096, i32 4096, i32 4096, i32 4096> + %2 = xor <4 x i32> %1, <i32 4096, i32 4096, i32 4096, i32 4096> + ret <4 x i32> %2 +; X64: test10: +; X64: andnps +; X32: test10: +; X32: andnps +} |