diff options
Diffstat (limited to 'test/MC/Disassembler/AArch64/arm64-arithmetic.txt')
| -rw-r--r-- | test/MC/Disassembler/AArch64/arm64-arithmetic.txt | 526 |
1 files changed, 526 insertions, 0 deletions
diff --git a/test/MC/Disassembler/AArch64/arm64-arithmetic.txt b/test/MC/Disassembler/AArch64/arm64-arithmetic.txt new file mode 100644 index 0000000000..bd870edc8a --- /dev/null +++ b/test/MC/Disassembler/AArch64/arm64-arithmetic.txt @@ -0,0 +1,526 @@ +# RUN: llvm-mc -triple arm64-apple-darwin --disassemble < %s | FileCheck %s + +#==---------------------------------------------------------------------------== +# Add/Subtract with carry/borrow +#==---------------------------------------------------------------------------== + +0x41 0x00 0x03 0x1a +0x41 0x00 0x03 0x9a +0x85 0x00 0x03 0x3a +0x85 0x00 0x03 0xba + +# CHECK: adc w1, w2, w3 +# CHECK: adc x1, x2, x3 +# CHECK: adcs w5, w4, w3 +# CHECK: adcs x5, x4, x3 + +0x41 0x00 0x03 0x5a +0x41 0x00 0x03 0xda +0x41 0x00 0x03 0x7a +0x41 0x00 0x03 0xfa + +# CHECK: sbc w1, w2, w3 +# CHECK: sbc x1, x2, x3 +# CHECK: sbcs w1, w2, w3 +# CHECK: sbcs x1, x2, x3 + +#==---------------------------------------------------------------------------== +# Add/Subtract with (optionally shifted) immediate +#==---------------------------------------------------------------------------== + +0x83 0x00 0x10 0x11 +0x83 0x00 0x10 0x91 + +# CHECK: add w3, w4, #1024 +# CHECK: add x3, x4, #1024 + +0x83 0x00 0x50 0x11 +0x83 0x00 0x40 0x11 +0x83 0x00 0x50 0x91 +0x83 0x00 0x40 0x91 +0xff 0x83 0x00 0x91 + +# CHECK: add w3, w4, #1024, lsl #12 +# CHECK: add x3, x4, #1024, lsl #12 +# CHECK: add x3, x4, #0, lsl #12 +# CHECK: add sp, sp, #32 + +0x83 0x00 0x10 0x31 +0x83 0x00 0x50 0x31 +0x83 0x00 0x10 0xb1 +0x83 0x00 0x50 0xb1 +0xff 0x83 0x00 0xb1 + +# CHECK: adds w3, w4, #1024 +# CHECK: adds w3, w4, #1024, lsl #12 +# CHECK: adds x3, x4, #1024 +# CHECK: adds x3, x4, #1024, lsl #12 +# CHECK: cmn sp, #32 + +0x83 0x00 0x10 0x51 +0x83 0x00 0x50 0x51 +0x83 0x00 0x10 0xd1 +0x83 0x00 0x50 0xd1 +0xff 0x83 0x00 0xd1 + +# CHECK: sub w3, w4, #1024 +# CHECK: sub w3, w4, #1024, lsl #12 +# CHECK: sub x3, x4, #1024 +# CHECK: sub x3, x4, #1024, lsl #12 +# CHECK: sub sp, sp, #32 + +0x83 0x00 0x10 0x71 +0x83 0x00 0x50 0x71 +0x83 0x00 0x10 0xf1 +0x83 0x00 0x50 0xf1 +0xff 0x83 0x00 0xf1 + +# CHECK: subs w3, w4, #1024 +# CHECK: subs w3, w4, #1024, lsl #12 +# CHECK: subs x3, x4, #1024 +# CHECK: subs x3, x4, #1024, lsl #12 +# CHECK: cmp sp, #32 + +#==---------------------------------------------------------------------------== +# Add/Subtract register with (optional) shift +#==---------------------------------------------------------------------------== + +0xac 0x01 0x0e 0x0b +0xac 0x01 0x0e 0x8b +0xac 0x31 0x0e 0x0b +0xac 0x31 0x0e 0x8b +0xac 0x29 0x4e 0x0b +0xac 0x29 0x4e 0x8b +0xac 0x1d 0x8e 0x0b +0xac 0x9d 0x8e 0x8b + +# CHECK: add w12, w13, w14 +# CHECK: add x12, x13, x14 +# CHECK: add w12, w13, w14, lsl #12 +# CHECK: add x12, x13, x14, lsl #12 +# CHECK: add w12, w13, w14, lsr #10 +# CHECK: add x12, x13, x14, lsr #10 +# CHECK: add w12, w13, w14, asr #7 +# CHECK: add x12, x13, x14, asr #39 + +0xac 0x01 0x0e 0x4b +0xac 0x01 0x0e 0xcb +0xac 0x31 0x0e 0x4b +0xac 0x31 0x0e 0xcb +0xac 0x29 0x4e 0x4b +0xac 0x29 0x4e 0xcb +0xac 0x1d 0x8e 0x4b +0xac 0x9d 0x8e 0xcb + +# CHECK: sub w12, w13, w14 +# CHECK: sub x12, x13, x14 +# CHECK: sub w12, w13, w14, lsl #12 +# CHECK: sub x12, x13, x14, lsl #12 +# CHECK: sub w12, w13, w14, lsr #10 +# CHECK: sub x12, x13, x14, lsr #10 +# CHECK: sub w12, w13, w14, asr #7 +# CHECK: sub x12, x13, x14, asr #39 + +0xac 0x01 0x0e 0x2b +0xac 0x01 0x0e 0xab +0xac 0x31 0x0e 0x2b +0xac 0x31 0x0e 0xab +0xac 0x29 0x4e 0x2b +0xac 0x29 0x4e 0xab +0xac 0x1d 0x8e 0x2b +0xac 0x9d 0x8e 0xab + +# CHECK: adds w12, w13, w14 +# CHECK: adds x12, x13, x14 +# CHECK: adds w12, w13, w14, lsl #12 +# CHECK: adds x12, x13, x14, lsl #12 +# CHECK: adds w12, w13, w14, lsr #10 +# CHECK: adds x12, x13, x14, lsr #10 +# CHECK: adds w12, w13, w14, asr #7 +# CHECK: adds x12, x13, x14, asr #39 + +0xac 0x01 0x0e 0x6b +0xac 0x01 0x0e 0xeb +0xac 0x31 0x0e 0x6b +0xac 0x31 0x0e 0xeb +0xac 0x29 0x4e 0x6b +0xac 0x29 0x4e 0xeb +0xac 0x1d 0x8e 0x6b +0xac 0x9d 0x8e 0xeb + +# CHECK: subs w12, w13, w14 +# CHECK: subs x12, x13, x14 +# CHECK: subs w12, w13, w14, lsl #12 +# CHECK: subs x12, x13, x14, lsl #12 +# CHECK: subs w12, w13, w14, lsr #10 +# CHECK: subs x12, x13, x14, lsr #10 +# CHECK: subs w12, w13, w14, asr #7 +# CHECK: subs x12, x13, x14, asr #39 + +#==---------------------------------------------------------------------------== +# Add/Subtract with (optional) extend +#==---------------------------------------------------------------------------== + +0x41 0x00 0x23 0x0b +0x41 0x20 0x23 0x0b +0x41 0x40 0x23 0x0b +0x41 0x60 0x23 0x0b +0x41 0x80 0x23 0x0b +0x41 0xa0 0x23 0x0b +0x41 0xc0 0x23 0x0b +0x41 0xe0 0x23 0x0b + +# CHECK: add w1, w2, w3, uxtb +# CHECK: add w1, w2, w3, uxth +# CHECK: add w1, w2, w3 +# CHECK: add w1, w2, w3, uxtx +# CHECK: add w1, w2, w3, sxtb +# CHECK: add w1, w2, w3, sxth +# CHECK: add w1, w2, w3, sxtw +# CHECK: add w1, w2, w3, sxtx + +0x41 0x00 0x23 0x8b +0x41 0x20 0x23 0x8b +0x41 0x40 0x23 0x8b +0x41 0x80 0x23 0x8b +0x41 0xa0 0x23 0x8b +0x41 0xc0 0x23 0x8b + +# CHECK: add x1, x2, w3, uxtb +# CHECK: add x1, x2, w3, uxth +# CHECK: add x1, x2, w3, uxtw +# CHECK: add x1, x2, w3, sxtb +# CHECK: add x1, x2, w3, sxth +# CHECK: add x1, x2, w3, sxtw + +0xe1 0x43 0x23 0x0b +0xe1 0x43 0x23 0x0b +0x5f 0x60 0x23 0x8b +0x5f 0x60 0x23 0x8b + +# CHECK: add w1, wsp, w3 +# CHECK: add w1, wsp, w3 +# CHECK: add sp, x2, x3 +# CHECK: add sp, x2, x3 + +0x41 0x00 0x23 0x4b +0x41 0x20 0x23 0x4b +0x41 0x40 0x23 0x4b +0x41 0x60 0x23 0x4b +0x41 0x80 0x23 0x4b +0x41 0xa0 0x23 0x4b +0x41 0xc0 0x23 0x4b +0x41 0xe0 0x23 0x4b + +# CHECK: sub w1, w2, w3, uxtb +# CHECK: sub w1, w2, w3, uxth +# CHECK: sub w1, w2, w3 +# CHECK: sub w1, w2, w3, uxtx +# CHECK: sub w1, w2, w3, sxtb +# CHECK: sub w1, w2, w3, sxth +# CHECK: sub w1, w2, w3, sxtw +# CHECK: sub w1, w2, w3, sxtx + +0x41 0x00 0x23 0xcb +0x41 0x20 0x23 0xcb +0x41 0x40 0x23 0xcb +0x41 0x80 0x23 0xcb +0x41 0xa0 0x23 0xcb +0x41 0xc0 0x23 0xcb + +# CHECK: sub x1, x2, w3, uxtb +# CHECK: sub x1, x2, w3, uxth +# CHECK: sub x1, x2, w3, uxtw +# CHECK: sub x1, x2, w3, sxtb +# CHECK: sub x1, x2, w3, sxth +# CHECK: sub x1, x2, w3, sxtw + +0xe1 0x43 0x23 0x4b +0xe1 0x43 0x23 0x4b +0x5f 0x60 0x23 0xcb +0x5f 0x60 0x23 0xcb + +# CHECK: sub w1, wsp, w3 +# CHECK: sub w1, wsp, w3 +# CHECK: sub sp, x2, x3 +# CHECK: sub sp, x2, x3 + +0x41 0x00 0x23 0x2b +0x41 0x20 0x23 0x2b +0x41 0x40 0x23 0x2b +0x41 0x60 0x23 0x2b +0x41 0x80 0x23 0x2b +0x41 0xa0 0x23 0x2b +0x41 0xc0 0x23 0x2b +0x41 0xe0 0x23 0x2b + +# CHECK: adds w1, w2, w3, uxtb +# CHECK: adds w1, w2, w3, uxth +# CHECK: adds w1, w2, w3 +# CHECK: adds w1, w2, w3, uxtx +# CHECK: adds w1, w2, w3, sxtb +# CHECK: adds w1, w2, w3, sxth +# CHECK: adds w1, w2, w3, sxtw +# CHECK: adds w1, w2, w3, sxtx + +0x41 0x00 0x23 0xab +0x41 0x20 0x23 0xab +0x41 0x40 0x23 0xab +0x41 0x80 0x23 0xab +0x41 0xa0 0x23 0xab +0x41 0xc0 0x23 0xab + +# CHECK: adds x1, x2, w3, uxtb +# CHECK: adds x1, x2, w3, uxth +# CHECK: adds x1, x2, w3, uxtw +# CHECK: adds x1, x2, w3, sxtb +# CHECK: adds x1, x2, w3, sxth +# CHECK: adds x1, x2, w3, sxtw + +0xe1 0x43 0x23 0x2b +0xe1 0x43 0x23 0x2b + +# CHECK: adds w1, wsp, w3 +# CHECK: adds w1, wsp, w3 + +0x41 0x00 0x23 0x6b +0x41 0x20 0x23 0x6b +0x41 0x40 0x23 0x6b +0x41 0x60 0x23 0x6b +0x41 0x80 0x23 0x6b +0x41 0xa0 0x23 0x6b +0x41 0xc0 0x23 0x6b +0x41 0xe0 0x23 0x6b + +# CHECK: subs w1, w2, w3, uxtb +# CHECK: subs w1, w2, w3, uxth +# CHECK: subs w1, w2, w3 +# CHECK: subs w1, w2, w3, uxtx +# CHECK: subs w1, w2, w3, sxtb +# CHECK: subs w1, w2, w3, sxth +# CHECK: subs w1, w2, w3, sxtw +# CHECK: subs w1, w2, w3, sxtx + +0x41 0x00 0x23 0xeb +0x41 0x20 0x23 0xeb +0x41 0x40 0x23 0xeb +0x41 0x80 0x23 0xeb +0x41 0xa0 0x23 0xeb +0x41 0xc0 0x23 0xeb + +# CHECK: subs x1, x2, w3, uxtb +# CHECK: subs x1, x2, w3, uxth +# CHECK: subs x1, x2, w3, uxtw +# CHECK: subs x1, x2, w3, sxtb +# CHECK: subs x1, x2, w3, sxth +# CHECK: subs x1, x2, w3, sxtw + +0xe1 0x43 0x23 0x6b +0xe1 0x43 0x23 0x6b + +# CHECK: subs w1, wsp, w3 +# CHECK: subs w1, wsp, w3 + +0x1f 0x41 0x28 0xeb +0x3f 0x41 0x28 0x6b +0xff 0x43 0x28 0x6b +0xff 0x43 0x28 0xeb + +# CHECK: cmp x8, w8, uxtw +# CHECK: cmp w9, w8, uxtw +# CHECK: cmp wsp, w8 +# CHECK: cmp sp, w8 + +0x3f 0x41 0x28 0x4b +0xe1 0x43 0x28 0x4b +0xff 0x43 0x28 0x4b +0x3f 0x41 0x28 0xcb +0xe1 0x43 0x28 0xcb +0xff 0x43 0x28 0xcb +0xe1 0x43 0x28 0x6b +0xe1 0x43 0x28 0xeb + +# CHECK: sub wsp, w9, w8 +# CHECK: sub w1, wsp, w8 +# CHECK: sub wsp, wsp, w8 +# CHECK: sub sp, x9, w8 +# CHECK: sub x1, sp, w8 +# CHECK: sub sp, sp, w8 +# CHECK: subs w1, wsp, w8 +# CHECK: subs x1, sp, w8 + +#==---------------------------------------------------------------------------== +# Signed/Unsigned divide +#==---------------------------------------------------------------------------== + +0x41 0x0c 0xc3 0x1a +0x41 0x0c 0xc3 0x9a +0x41 0x08 0xc3 0x1a +0x41 0x08 0xc3 0x9a + +# CHECK: sdiv w1, w2, w3 +# CHECK: sdiv x1, x2, x3 +# CHECK: udiv w1, w2, w3 +# CHECK: udiv x1, x2, x3 + +#==---------------------------------------------------------------------------== +# Variable shifts +#==---------------------------------------------------------------------------== + + 0x41 0x28 0xc3 0x1a +# CHECK: asr w1, w2, w3 + 0x41 0x28 0xc3 0x9a +# CHECK: asr x1, x2, x3 + 0x41 0x20 0xc3 0x1a +# CHECK: lsl w1, w2, w3 + 0x41 0x20 0xc3 0x9a +# CHECK: lsl x1, x2, x3 + 0x41 0x24 0xc3 0x1a +# CHECK: lsr w1, w2, w3 + 0x41 0x24 0xc3 0x9a +# CHECK: lsr x1, x2, x3 + 0x41 0x2c 0xc3 0x1a +# CHECK: ror w1, w2, w3 + 0x41 0x2c 0xc3 0x9a +# CHECK: ror x1, x2, x3 + +#==---------------------------------------------------------------------------== +# One operand instructions +#==---------------------------------------------------------------------------== + + 0x41 0x14 0xc0 0x5a +# CHECK: cls w1, w2 + 0x41 0x14 0xc0 0xda +# CHECK: cls x1, x2 + 0x41 0x10 0xc0 0x5a +# CHECK: clz w1, w2 + 0x41 0x10 0xc0 0xda +# CHECK: clz x1, x2 + 0x41 0x00 0xc0 0x5a +# CHECK: rbit w1, w2 + 0x41 0x00 0xc0 0xda +# CHECK: rbit x1, x2 + 0x41 0x08 0xc0 0x5a +# CHECK: rev w1, w2 + 0x41 0x0c 0xc0 0xda +# CHECK: rev x1, x2 + 0x41 0x04 0xc0 0x5a +# CHECK: rev16 w1, w2 + 0x41 0x04 0xc0 0xda +# CHECK: rev16 x1, x2 + 0x41 0x08 0xc0 0xda +# CHECK: rev32 x1, x2 + +#==---------------------------------------------------------------------------== +# 6.6.1 Multiply-add instructions +#==---------------------------------------------------------------------------== + +0x41 0x10 0x03 0x1b +0x41 0x10 0x03 0x9b +0x41 0x90 0x03 0x1b +0x41 0x90 0x03 0x9b +0x41 0x10 0x23 0x9b +0x41 0x90 0x23 0x9b +0x41 0x10 0xa3 0x9b +0x41 0x90 0xa3 0x9b + +# CHECK: madd w1, w2, w3, w4 +# CHECK: madd x1, x2, x3, x4 +# CHECK: msub w1, w2, w3, w4 +# CHECK: msub x1, x2, x3, x4 +# CHECK: smaddl x1, w2, w3, x4 +# CHECK: smsubl x1, w2, w3, x4 +# CHECK: umaddl x1, w2, w3, x4 +# CHECK: umsubl x1, w2, w3, x4 + +#==---------------------------------------------------------------------------== +# Multiply-high instructions +#==---------------------------------------------------------------------------== + +0x41 0x7c 0x43 0x9b +0x41 0x7c 0xc3 0x9b + +# CHECK: smulh x1, x2, x3 +# CHECK: umulh x1, x2, x3 + +#==---------------------------------------------------------------------------== +# Move immediate instructions +#==---------------------------------------------------------------------------== + +0x20 0x00 0x80 0x52 +0x20 0x00 0x80 0xd2 +0x20 0x00 0xa0 0x52 +0x20 0x00 0xa0 0xd2 + +# CHECK: movz w0, #0x1 +# CHECK: movz x0, #0x1 +# CHECK: movz w0, #0x1, lsl #16 +# CHECK: movz x0, #0x1, lsl #16 + +0x40 0x00 0x80 0x12 +0x40 0x00 0x80 0x92 +0x40 0x00 0xa0 0x12 +0x40 0x00 0xa0 0x92 + +# CHECK: movn w0, #0x2 +# CHECK: movn x0, #0x2 +# CHECK: movn w0, #0x2, lsl #16 +# CHECK: movn x0, #0x2, lsl #16 + +0x20 0x00 0x80 0x72 +0x20 0x00 0x80 0xf2 +0x20 0x00 0xa0 0x72 +0x20 0x00 0xa0 0xf2 + +# CHECK: movk w0, #0x1 +# CHECK: movk x0, #0x1 +# CHECK: movk w0, #0x1, lsl #16 +# CHECK: movk x0, #0x1, lsl #16 + +#==---------------------------------------------------------------------------== +# Conditionally set flags instructions +#==---------------------------------------------------------------------------== + + 0x1f 0x00 0x00 0x31 +# CHECK: cmn w0, #0 + 0x1f 0xfc 0x03 0xb1 +# CHECK: x0, #255 + + 0x23 0x08 0x42 0x3a +# CHECK: ccmn w1, #2, #3, eq + 0x23 0x08 0x42 0xba +# CHECK: ccmn x1, #2, #3, eq + 0x23 0x08 0x42 0x7a +# CHECK: ccmp w1, #2, #3, eq + 0x23 0x08 0x42 0xfa +# CHECK: ccmp x1, #2, #3, eq + + 0x23 0x00 0x42 0x3a +# CHECK: ccmn w1, w2, #3, eq + 0x23 0x00 0x42 0xba +# CHECK: ccmn x1, x2, #3, eq + 0x23 0x00 0x42 0x7a +# CHECK: ccmp w1, w2, #3, eq + 0x23 0x00 0x42 0xfa +# CHECK: ccmp x1, x2, #3, eq + +#==---------------------------------------------------------------------------== +# Conditional select instructions +#==---------------------------------------------------------------------------== + + 0x41 0x00 0x83 0x1a +# CHECK: csel w1, w2, w3, eq + 0x41 0x00 0x83 0x9a +# CHECK: csel x1, x2, x3, eq + 0x41 0x04 0x83 0x1a +# CHECK: csinc w1, w2, w3, eq + 0x41 0x04 0x83 0x9a +# CHECK: csinc x1, x2, x3, eq + 0x41 0x00 0x83 0x5a +# CHECK: csinv w1, w2, w3, eq + 0x41 0x00 0x83 0xda +# CHECK: csinv x1, x2, x3, eq + 0x41 0x04 0x83 0x5a +# CHECK: csneg w1, w2, w3, eq + 0x41 0x04 0x83 0xda +# CHECK: csneg x1, x2, x3, eq |