diff options
Diffstat (limited to 'test/MC')
-rw-r--r-- | test/MC/AArch64/neon-diagnostics.s | 40 | ||||
-rw-r--r-- | test/MC/AArch64/neon-scalar-cvt.s | 20 | ||||
-rw-r--r-- | test/MC/Disassembler/AArch64/neon-instructions.txt | 16 |
3 files changed, 76 insertions, 0 deletions
diff --git a/test/MC/AArch64/neon-diagnostics.s b/test/MC/AArch64/neon-diagnostics.s index f94c483066..4e1207f031 100644 --- a/test/MC/AArch64/neon-diagnostics.s +++ b/test/MC/AArch64/neon-diagnostics.s @@ -4992,3 +4992,43 @@ // CHECK-ERROR: error: expected integer in range [1, 32] // CHECK-ERROR: sqrshrun s22, d16, #99 // CHECK-ERROR: ^ + +//---------------------------------------------------------------------- +// Scalar Signed Fixed-point Convert To Floating-Point (Immediate) +//---------------------------------------------------------------------- + + scvtf s22, s13, #0 + scvtf s22, s13, #33 + scvtf d21, d12, #65 + scvtf d21, s12, #31 + +// CHECK-ERROR: error: expected integer in range [1, 32] +// CHECK-ERROR: scvtf s22, s13, #0 +// CHECK-ERROR: ^ +// CHECK-ERROR: error: expected integer in range [1, 32] +// CHECK-ERROR: scvtf s22, s13, #33 +// CHECK-ERROR: ^ +// CHECK-ERROR: error: expected integer in range [1, 64] +// CHECK-ERROR: scvtf d21, d12, #65 +// CHECK-ERROR: ^ +// CHECK-ERROR: error: invalid operand for instruction +// CHECK-ERROR: scvtf d21, s12, #31 +// CHECK-ERROR: ^ + +//---------------------------------------------------------------------- +// Scalar Unsigned Fixed-point Convert To Floating-Point (Immediate) +//---------------------------------------------------------------------- + + ucvtf s22, s13, #34 + ucvtf d21, d14, #65 + ucvtf d21, s14, #64 + +// CHECK-ERROR: error: expected integer in range [1, 32] +// CHECK-ERROR: ucvtf s22, s13, #34 +// CHECK-ERROR: ^ +// CHECK-ERROR: error: expected integer in range [1, 64] +// CHECK-ERROR: ucvtf d21, d14, #65 +// CHECK-ERROR: ^ +// CHECK-ERROR: error: invalid operand for instruction +// CHECK-ERROR: ucvtf d21, s14, #64 +// CHECK-ERROR: ^ diff --git a/test/MC/AArch64/neon-scalar-cvt.s b/test/MC/AArch64/neon-scalar-cvt.s index 07faef7453..93115ad648 100644 --- a/test/MC/AArch64/neon-scalar-cvt.s +++ b/test/MC/AArch64/neon-scalar-cvt.s @@ -21,3 +21,23 @@ // CHECK: ucvtf s22, s13 // encoding: [0xb6,0xd9,0x21,0x7e] // CHECK: ucvtf d21, d14 // encoding: [0xd5,0xd9,0x61,0x7e] + +//---------------------------------------------------------------------- +// Scalar Signed Fixed-point Convert To Floating-Point (Immediate) +//---------------------------------------------------------------------- + + scvtf s22, s13, #32 + scvtf d21, d12, #64 + +// CHECK: scvtf s22, s13, #32 // encoding: [0xb6,0xe5,0x20,0x5f] +// CHECK: scvtf d21, d12, #64 // encoding: [0x95,0xe5,0x40,0x5f] + +//---------------------------------------------------------------------- +// Scalar Unsigned Fixed-point Convert To Floating-Point (Immediate) +//---------------------------------------------------------------------- + + ucvtf s22, s13, #32 + ucvtf d21, d14, #64 + +// CHECK: ucvtf s22, s13, #32 // encoding: [0xb6,0xe5,0x20,0x7f] +// CHECK: ucvtf d21, d14, #64 // encoding: [0xd5,0xe5,0x40,0x7f] diff --git a/test/MC/Disassembler/AArch64/neon-instructions.txt b/test/MC/Disassembler/AArch64/neon-instructions.txt index c63b65a280..e97728283b 100644 --- a/test/MC/Disassembler/AArch64/neon-instructions.txt +++ b/test/MC/Disassembler/AArch64/neon-instructions.txt @@ -1955,3 +1955,19 @@ 0x51,0x8d,0x0a,0x7f 0xaa,0x8d,0x11,0x7f 0x16,0x8e,0x21,0x7f + +#---------------------------------------------------------------------- +# Scalar Signed Fixed-point Convert To Floating-Point (Immediate) +#---------------------------------------------------------------------- +# CHECK: scvtf s22, s13, #32 +# CHECK: scvtf d21, d12, #64 +0xb6,0xe5,0x20,0x5f +0x95,0xe5,0x40,0x5f + +#---------------------------------------------------------------------- +# Scalar Unsigned Fixed-point Convert To Floating-Point (Immediate) +#---------------------------------------------------------------------- +# CHECK: ucvtf s22, s13, #32 +# CHECK: ucvtf d21, d14, #64 +0xb6,0xe5,0x20,0x7f +0xd5,0xe5,0x40,0x7f |