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-rw-r--r--test/CodeGen/X86/anyregcc.ll18
-rw-r--r--test/CodeGen/X86/stackmap.ll44
2 files changed, 52 insertions, 10 deletions
diff --git a/test/CodeGen/X86/anyregcc.ll b/test/CodeGen/X86/anyregcc.ll
index 8109f879f2..300db34b97 100644
--- a/test/CodeGen/X86/anyregcc.ll
+++ b/test/CodeGen/X86/anyregcc.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-apple-darwin | FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-apple-darwin -disable-fp-elim | FileCheck %s
; Stackmap Header: no constants - 6 callsites
; CHECK-LABEL: .section __LLVM_STACKMAPS,__llvm_stackmaps
@@ -95,11 +95,11 @@ entry:
; CHECK-NEXT: .byte 8
; CHECK-NEXT: .short {{[0-9]+}}
; CHECK-NEXT: .long 0
-; Loc 1: Register <-- this will be folded once folding for FI is implemented
-; CHECK-NEXT: .byte 1
+; Loc 1: Direct RBP - ofs
+; CHECK-NEXT: .byte 2
; CHECK-NEXT: .byte 8
-; CHECK-NEXT: .short {{[0-9]+}}
-; CHECK-NEXT: .long 0
+; CHECK-NEXT: .short 6
+; CHECK-NEXT: .long
define i64 @property_access3() nounwind ssp uwtable {
entry:
%obj = alloca i64, align 8
@@ -330,13 +330,13 @@ entry:
; Loc 3: Arg2 spilled to RBP +
; CHECK-NEXT: .byte 3
; CHECK-NEXT: .byte 8
-; CHECK-NEXT: .short 7
-; CHECK-NEXT: .long {{[0-9]+}}
+; CHECK-NEXT: .short 6
+; CHECK-NEXT: .long
; Loc 4: Arg3 spilled to RBP +
; CHECK-NEXT: .byte 3
; CHECK-NEXT: .byte 8
-; CHECK-NEXT: .short 7
-; CHECK-NEXT: .long {{[0-9]+}}
+; CHECK-NEXT: .short 6
+; CHECK-NEXT: .long
define i64 @patchpoint_spillargs(i64 %p1, i64 %p2, i64 %p3, i64 %p4) {
entry:
tail call void asm sideeffect "nop", "~{ax},~{bx},~{cx},~{dx},~{bp},~{si},~{di},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15}"() nounwind
diff --git a/test/CodeGen/X86/stackmap.ll b/test/CodeGen/X86/stackmap.ll
index 2cc198db17..55532e96ac 100644
--- a/test/CodeGen/X86/stackmap.ll
+++ b/test/CodeGen/X86/stackmap.ll
@@ -9,7 +9,7 @@
; CHECK-NEXT: .long 1
; CHECK-NEXT: .quad 4294967296
; Num Callsites
-; CHECK-NEXT: .long 12
+; CHECK-NEXT: .long 14
; Constant arguments
;
@@ -305,6 +305,48 @@ define void @liveConstant() {
ret void
}
+; Directly map an alloca's address.
+;
+; Callsite 16
+; CHECK: .long 16
+; CHECK-LABEL: .long L{{.*}}-_directFrameIdx
+; CHECK-NEXT: .short 0
+; 1 location
+; CHECK-NEXT: .short 1
+; Loc 0: Direct RBP - ofs
+; CHECK-NEXT: .byte 2
+; CHECK-NEXT: .byte 8
+; CHECK-NEXT: .short 6
+; CHECK-NEXT: .long
+; Callsite 17
+; CHECK-NEXT: .long 17
+; CHECK-NEXT: .long L{{.*}}-_directFrameIdx
+; CHECK-NEXT: .short 0
+; 2 locations
+; CHECK-NEXT: .short 2
+; Loc 0: Direct RBP - ofs
+; CHECK-NEXT: .byte 2
+; CHECK-NEXT: .byte 8
+; CHECK-NEXT: .short 6
+; CHECK-NEXT: .long
+; Loc 1: Direct RBP - ofs
+; CHECK-NEXT: .byte 2
+; CHECK-NEXT: .byte 8
+; CHECK-NEXT: .short 6
+; CHECK-NEXT: .long
+define void @directFrameIdx() {
+entry:
+ %metadata1 = alloca i64, i32 3, align 8
+ store i64 11, i64* %metadata1
+ store i64 12, i64* %metadata1
+ store i64 13, i64* %metadata1
+ call void (i32, i32, ...)* @llvm.experimental.stackmap(i32 16, i32 0, i64* %metadata1)
+ %metadata2 = alloca i8, i32 4, align 8
+ %metadata3 = alloca i16, i32 4, align 8
+ call void (i32, i32, i8*, i32, ...)* @llvm.experimental.patchpoint.void(i32 17, i32 5, i8* null, i32 0, i8* %metadata2, i16* %metadata3)
+ ret void
+}
+
declare void @llvm.experimental.stackmap(i32, i32, ...)
declare void @llvm.experimental.patchpoint.void(i32, i32, i8*, i32, ...)
declare i64 @llvm.experimental.patchpoint.i64(i32, i32, i8*, i32, ...)