diff options
Diffstat (limited to 'test')
| -rw-r--r-- | test/CodeGen/X86/fold-pcmpeqd-0.ll | 8 | ||||
| -rw-r--r-- | test/CodeGen/X86/multiple-libcalls-and-twoaddr-deps-scheduling.ll | 16 |
2 files changed, 17 insertions, 7 deletions
diff --git a/test/CodeGen/X86/fold-pcmpeqd-0.ll b/test/CodeGen/X86/fold-pcmpeqd-0.ll index 647bbdb7f0..6095a9cd20 100644 --- a/test/CodeGen/X86/fold-pcmpeqd-0.ll +++ b/test/CodeGen/X86/fold-pcmpeqd-0.ll @@ -3,15 +3,9 @@ ; This testcase shouldn't need to spill the -1 value, ; so it should just use pcmpeqd to materialize an all-ones vector. -; For i386, cp load of -1 are folded. -; With -regalloc=greedy, the live range is split before spilling, so the first -; pcmpeq doesn't get folded as a constant pool load. - -; I386-NOT: pcmpeqd -; I386: orps LCPI0_2, %xmm +; I386: pcmpeqd ; I386-NOT: pcmpeqd -; I386: orps LCPI0_2, %xmm ; X86-64: pcmpeqd ; X86-64-NOT: pcmpeqd diff --git a/test/CodeGen/X86/multiple-libcalls-and-twoaddr-deps-scheduling.ll b/test/CodeGen/X86/multiple-libcalls-and-twoaddr-deps-scheduling.ll new file mode 100644 index 0000000000..b114a57966 --- /dev/null +++ b/test/CodeGen/X86/multiple-libcalls-and-twoaddr-deps-scheduling.ll @@ -0,0 +1,16 @@ +; RUN: llc -march=x86 -mcpu=pentium4 -mtriple=i686-none-linux < %s +; PR11314 + +; Make sure the scheduler's hack to insert artificial dependencies to optimize +; two-address instruction scheduling doesn't interfere with the scheduler's +; hack to model call sequences as artificial physical registers. + +define inreg { i64, i64 } @sscanf(i32 inreg %base.1.i) nounwind { +entry: + %conv38.i92.i = sext i32 %base.1.i to i64 + %rem.i93.i = urem i64 10, %conv38.i92.i + %div.i94.i = udiv i64 10, %conv38.i92.i + %a = insertvalue { i64, i64 } undef, i64 %rem.i93.i, 0 + %b = insertvalue { i64, i64 } %a, i64 %div.i94.i, 1 + ret { i64, i64 } %b +} |