diff options
Diffstat (limited to 'utils/TableGen/CodeGenRegisters.h')
-rw-r--r-- | utils/TableGen/CodeGenRegisters.h | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/utils/TableGen/CodeGenRegisters.h b/utils/TableGen/CodeGenRegisters.h index ae8f0d4abd..74cf4127a3 100644 --- a/utils/TableGen/CodeGenRegisters.h +++ b/utils/TableGen/CodeGenRegisters.h @@ -90,6 +90,9 @@ namespace llvm { std::vector<SmallVector<Record*, 16> > AltOrders; // Bit mask of sub-classes including this, indexed by their EnumValue. BitVector SubClasses; + // List of super-classes, topologocally ordered to have the larger classes + // first. This is the same as sorting by EnumValue. + SmallVector<CodeGenRegisterClass*, 4> SuperClasses; public: Record *TheDef; unsigned EnumValue; @@ -128,6 +131,17 @@ namespace llvm { // bool hasSubClass(const CodeGenRegisterClass *RC) const; + // getSubClasses - Returns a constant BitVector of subclasses indexed by + // EnumValue. + // The SubClasses vector includs an entry for this class. + const BitVector &getSubClasses() const { return SubClasses; }; + + // getSuperClasses - Returns a list of super classes ordered by EnumValue. + // The array does not include an entry for this class. + ArrayRef<CodeGenRegisterClass*> getSuperClasses() const { + return SuperClasses; + } + // Returns an ordered list of class members. // The order of registers is the same as in the .td file. // No = 0 is the default allocation order, No = 1 is the first alternative. |