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-rw-r--r--utils/TableGen/X86RecognizableInstr.cpp7
-rw-r--r--utils/TableGen/X86RecognizableInstr.h4
2 files changed, 10 insertions, 1 deletions
diff --git a/utils/TableGen/X86RecognizableInstr.cpp b/utils/TableGen/X86RecognizableInstr.cpp
index ce8ea1a39a..b8b282a7a6 100644
--- a/utils/TableGen/X86RecognizableInstr.cpp
+++ b/utils/TableGen/X86RecognizableInstr.cpp
@@ -221,6 +221,7 @@ RecognizableInstr::RecognizableInstr(DisassemblerTables &tables,
HasVEX_4VPrefix = Rec->getValueAsBit("hasVEX_4VPrefix");
HasVEX_4VOp3Prefix = Rec->getValueAsBit("hasVEX_4VOp3Prefix");
HasVEX_WPrefix = Rec->getValueAsBit("hasVEX_WPrefix");
+ HasMemOp4Prefix = Rec->getValueAsBit("hasMemOp4Prefix");
IgnoresVEX_L = Rec->getValueAsBit("ignoresVEX_L");
HasLockPrefix = Rec->getValueAsBit("hasLockPrefix");
IsCodeGenOnly = Rec->getValueAsBit("isCodeGenOnly");
@@ -690,6 +691,9 @@ void RecognizableInstr::emitInstructionSpecifier(DisassemblerTables &tables) {
// in ModRMVEX and the one above the one in the VEX.VVVV field
HANDLE_OPERAND(vvvvRegister)
+ if (HasMemOp4Prefix)
+ HANDLE_OPERAND(immediate)
+
HANDLE_OPERAND(rmRegister)
if (HasVEX_4VOp3Prefix)
@@ -717,6 +721,9 @@ void RecognizableInstr::emitInstructionSpecifier(DisassemblerTables &tables) {
// in ModRMVEX and the one above the one in the VEX.VVVV field
HANDLE_OPERAND(vvvvRegister)
+ if (HasMemOp4Prefix)
+ HANDLE_OPERAND(immediate)
+
HANDLE_OPERAND(memory)
if (HasVEX_4VOp3Prefix)
diff --git a/utils/TableGen/X86RecognizableInstr.h b/utils/TableGen/X86RecognizableInstr.h
index 42a5fec1d3..3ae112b1e7 100644
--- a/utils/TableGen/X86RecognizableInstr.h
+++ b/utils/TableGen/X86RecognizableInstr.h
@@ -62,7 +62,9 @@ private:
bool HasVEX_WPrefix;
/// Inferred from the operands; indicates whether the L bit in the VEX prefix is set
bool HasVEX_LPrefix;
- // The ignoreVEX_L field from the record
+ /// The hasMemOp4Prefix field from the record
+ bool HasMemOp4Prefix;
+ /// The ignoreVEX_L field from the record
bool IgnoresVEX_L;
/// The hasLockPrefix field from the record
bool HasLockPrefix;