summaryrefslogtreecommitdiff
Commit message (Collapse)AuthorAge
* Pass -lLTO after gold-plugin.o so that it gets used in systems that default toRafael Espindola2012-08-27
| | | | | | | --as-needed. Patch by Felix Geyer. Fixes pr13262. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162652 91177308-0d34-0410-b5e6-96231b3b80d8
* Mark avx2 maskstore has ReadWriteArgMem. Mark broadcast and maskload as ↵Craig Topper2012-08-26
| | | | | | ReadArgMem. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162649 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix integer undefined behavior due to signed left shift overflow in LLVM.Richard Smith2012-08-24
| | | | | | | Reviewed offline by chandlerc. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162623 91177308-0d34-0410-b5e6-96231b3b80d8
* Add missing mayLoad flags to a large class of AVX *_Int instructions.Jakob Stoklund Olesen2012-08-24
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162622 91177308-0d34-0410-b5e6-96231b3b80d8
* Missed tLEApcrelJT.Jakob Stoklund Olesen2012-08-24
| | | | | | | ARMConstantIslandPass expects this instruction to stay in the same basic block as the jump table branch. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162615 91177308-0d34-0410-b5e6-96231b3b80d8
* Infer instruction properties from single-instruction patterns.Jakob Stoklund Olesen2012-08-24
| | | | | | | | | | | | | | | | | | | | | Previously, instructions without a primary patterns wouldn't get their properties inferred. Now, we use all single-instruction patterns for inference, including 'def : Pat<>' instances. This causes a lot of instruction flags to change. - Many instructions no longer have the UnmodeledSideEffects flag because their flags are now inferred from a pattern. - Instructions with intrinsics will get a mayStore flag if they already have UnmodeledSideEffects and a mayLoad flag if they already have mayStore. This is because intrinsics properties are linear. - Instructions with atomic_load patterns get a mayStore flag because atomic loads can't be reordered. The correct workaround is to create pseudo-instructions instead of using normal loads. PR13693. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162614 91177308-0d34-0410-b5e6-96231b3b80d8
* Explicitly mark LEApcrel pseudos with hasSideEffects.Jakob Stoklund Olesen2012-08-24
| | | | | | | | | | It's not clear that they should be marked as such, but tbb formation fails if t2LEApcrelJT is hoisted of of a loop. This doesn't change the flags on these instructions, UnmodeledSideEffects was already inferred from the missing pattern. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162603 91177308-0d34-0410-b5e6-96231b3b80d8
* Stop inferring isVariadic from instruction patterns.Jakob Stoklund Olesen2012-08-24
| | | | | | | | | | | | | | | | | | Instructions are now only marked as variadic if they use variable_ops in their ins list. A variadic SDNode is typically used for call nodes that have the call arguments as operands. A variadic MachineInstr can actually encode a variable number of operands, for example ARM's stm/ldm instructions. A call instruction does not have to be variadic. The call argument registers are added as implicit operands. This change remove the MCID::Variadic flags from most call and return instructions, allowing us to better verify their operands. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162599 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix call instruction operands in ARMFastISel.Jakob Stoklund Olesen2012-08-24
| | | | | | | | | The ARM BL and BLX instructions don't have predicate operands, but the thumb variants tBL and tBLX do. The argument registers should be added as implicit uses. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162593 91177308-0d34-0410-b5e6-96231b3b80d8
* Mark X86::RET and RETI instructions as variadic.Jakob Stoklund Olesen2012-08-24
| | | | | | | There is special magic happening when returning floating point values on the x87 stack. The RET instructions get extra f80 operands. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162592 91177308-0d34-0410-b5e6-96231b3b80d8
* Avoid including explicit uses when counting SDNode imp-uses.Jakob Stoklund Olesen2012-08-24
| | | | | | | It is legal to have a register node as an explicit operand, it shouldn't be counted as an implicit use. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162591 91177308-0d34-0410-b5e6-96231b3b80d8
* Disable Mips' delay slot filler when optimization level is O0.Akira Hatanaka2012-08-24
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162589 91177308-0d34-0410-b5e6-96231b3b80d8
* In MipsDAGToDAGISel::SelectAddr, fold add node into address operand, if itsAkira Hatanaka2012-08-24
| | | | | | | | second operand is MipsISD::GPRel. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162584 91177308-0d34-0410-b5e6-96231b3b80d8
* Forgot to check in ProfileDataTypes.h in r162576Manman Ren2012-08-24
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162578 91177308-0d34-0410-b5e6-96231b3b80d8
* Profile: move a single enum out of ProfileInfoTypes.h into a new Manman Ren2012-08-24
| | | | | | | | | | | | | ProfileDataTypes.h header. With this patch the old and new profiling code can exist side-by-side. The new profiling code will be submitted soon and it only supports insert-edge-profiling for now and will not depend on ProfileInfo. Patch by Alastair Murray. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162576 91177308-0d34-0410-b5e6-96231b3b80d8
* BranchProb: modify the definition of an edge in BranchProbabilityInfo to handleManman Ren2012-08-24
| | | | | | | | | | | | | | | | the case of multiple edges from one block to another. A simple example is a switch statement with multiple values to the same destination. The definition of an edge is modified from a pair of blocks to a pair of PredBlock and an index into the successors. Also set the weight correctly when building SelectionDAG from LLVM IR, especially when converting a Switch. IntegersSubsetMapping is updated to calculate the weight for each cluster. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162572 91177308-0d34-0410-b5e6-96231b3b80d8
* Verify explicit instruction properties when they can be inferred.Jakob Stoklund Olesen2012-08-24
| | | | | | | | | It is now allowed to explicitly set hasSideEffects, mayStore, and mayLoad on instructions with patterns. Verify that the patterns are consistent with the explicit flags. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162569 91177308-0d34-0410-b5e6-96231b3b80d8
* [asan/tsan] rename FunctionBlackList* to BlackList* as this class is not ↵Kostya Serebryany2012-08-24
| | | | | | limited to functions any more git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162566 91177308-0d34-0410-b5e6-96231b3b80d8
* [asan/tsan] extend the functionality of FunctionBlackList to globals and ↵Kostya Serebryany2012-08-24
| | | | | | modules. Patch by Reid Watson. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162565 91177308-0d34-0410-b5e6-96231b3b80d8
* Lower constant pools and jump tables via TOC on PPC64/SVR4.Roman Divacky2012-08-24
| | | | | | | In collaboration with Adhemerval Zanella. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162562 91177308-0d34-0410-b5e6-96231b3b80d8
* GVN: Fix quadratic runtime on the number of switch cases.Benjamin Kramer2012-08-24
| | | | | | | | No intended behavior change. This was introduced in r162023. With the fixed algorithm a Release build of ARMInstPrinter.cpp goes from 16s to 10s on a 2011 MBP. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162559 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix load/store SDNode flags.Jakob Stoklund Olesen2012-08-24
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162558 91177308-0d34-0410-b5e6-96231b3b80d8
* Add missing SDNPSideEffect flags.Jakob Stoklund Olesen2012-08-24
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162557 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove more mayLoad workarounds.Jakob Stoklund Olesen2012-08-24
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162556 91177308-0d34-0410-b5e6-96231b3b80d8
* Try to appease MSVC even more elaborately in the alignment hacking space.Chandler Carruth2012-08-24
| | | | | | | | | | | | | | | | | | | | MSVC doesn't support passing by-value parameters with alignment of 16-bytes or higher apparantly. What is deeply confusing is that it seems to *sometimes* (but not always) apply this to any type whose alignment is set using __declspec(align(...)). This caused lots of errors when we switch SmallVector over to use the automatically aligned character array utilities as they used __declspec(align(...)) heavily. As a pretty horrible but effective work-around, we instead cherry pick the smallest alignment sizes with specific types that happen to have the correct alignment, and then fall back to the attribute solution past them. This should resolve the MSVC build errors folks have been hitting. Sorry for that. In good news, it will do this without introducing other UB I hope. =] Thanks to Timur Iskhodzhanov for helping me test this! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162549 91177308-0d34-0410-b5e6-96231b3b80d8
* Custom lower FMA intrinsics to target specific nodes and remove the patterns.Craig Topper2012-08-24
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162534 91177308-0d34-0410-b5e6-96231b3b80d8
* Use DW_FORM_flag_present to save space in debug information if we'reEric Christopher2012-08-24
| | | | | | | | not in darwin gdb compat mode. Fixes rdar://10975088 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162526 91177308-0d34-0410-b5e6-96231b3b80d8
* Add support for some missing DW_FORM_*.Eric Christopher2012-08-24
| | | | | | TODO: Fix code duplication and coding style. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162525 91177308-0d34-0410-b5e6-96231b3b80d8
* Formatting.Eric Christopher2012-08-24
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162524 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix undefined behavior (negation of INT_MIN) in ARM backend.Richard Smith2012-08-24
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162520 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix floating-point divide by zero, in a case where the value was not going ↵Richard Smith2012-08-24
| | | | | | to be used anyway. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162518 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove some spurious mayLoad = 0 flags.Jakob Stoklund Olesen2012-08-24
| | | | | | | They were inserted to silence TableGen's warning about redundant properties. That warning is now gone. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162517 91177308-0d34-0410-b5e6-96231b3b80d8
* Heed guessInstructionProperties, and stop warning on redundant flags.Jakob Stoklund Olesen2012-08-24
| | | | | | | | | | | | Emit TableGen errors if guessInstructionProperties is 0 and instruction properties can't be inferred from patterns. Allow explicit instruction properties even when they can be inferred. This patch doesn't change the TableGen output. Redundant properties are not yet verified because the tree has errors. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162516 91177308-0d34-0410-b5e6-96231b3b80d8
* Add missing SDNP properties on the flushw node.Jakob Stoklund Olesen2012-08-24
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162515 91177308-0d34-0410-b5e6-96231b3b80d8
* X86MemBarrier has unmodeled side effects.Jakob Stoklund Olesen2012-08-24
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162514 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix undefined behavior (signed integer overflow) when Clang parses a ↵Richard Smith2012-08-24
| | | | | | hexfloat with an enormous exponent. Caught by an existing unit test + -ftrapv. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162505 91177308-0d34-0410-b5e6-96231b3b80d8
* Formatting cleanup.Eric Christopher2012-08-23
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162499 91177308-0d34-0410-b5e6-96231b3b80d8
* Add an assert here in case parsing gave us a NULL compile unit.Eric Christopher2012-08-23
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162498 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove the DW_AT_MIPS_linkage name attribute when we don't need itEric Christopher2012-08-23
| | | | | | | | | | | output (we're emitting a specification already and the information isn't changing) and we're not in old gdb compat mode. Saves 1% on the debug information for a build of llvm. Fixes rdar://11043421 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162493 91177308-0d34-0410-b5e6-96231b3b80d8
* Turn these two options in to trinary state so that they can beEric Christopher2012-08-23
| | | | | | turned on and off separate from the platform if you're on darwin. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162487 91177308-0d34-0410-b5e6-96231b3b80d8
* Add a flag to DwarfDebug to allow it to communicate whether or notEric Christopher2012-08-23
| | | | | | we're using the darwin old gdb compat mode for emitting dwarf. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162486 91177308-0d34-0410-b5e6-96231b3b80d8
* Preserve operand flags in convertToThreeAddress() by copying operands.Jakob Stoklund Olesen2012-08-23
| | | | | | No test case, this is a generalization of r160260. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162485 91177308-0d34-0410-b5e6-96231b3b80d8
* Tristate mayLoad, mayStore, and hasSideEffects.Jakob Stoklund Olesen2012-08-23
| | | | | | | Keep track of the set/unset state of these bits along with their true/false values, but treat '?' as '0' for now. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162461 91177308-0d34-0410-b5e6-96231b3b80d8
* Add CodeGenTarget::guessInstructionProperties.Jakob Stoklund Olesen2012-08-23
| | | | | | | | | | | | Currently, TableGen just guesses instruction properties when it can't infer them form patterns. This adds a guessInstructionProperties flag to the instruction set definition that will be used to disable guessing. The flag is intended as a migration aid. It will be removed again when no more targets need their properties guessed. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162460 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix attributes on X86 store intrinsics.Jakob Stoklund Olesen2012-08-23
| | | | | | | These intrinsics don't have unmodeled side effects, they are just stores. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162459 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix a stub signature. HeuristicReduce should return a bool.Lang Hames2012-08-23
| | | | | | | This should fix a -Wdocumentation warning. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162458 91177308-0d34-0410-b5e6-96231b3b80d8
* Favor FMA3 over FMA4 if both are enabled.Craig Topper2012-08-23
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162454 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix a bunch of -Wdocumentation warnings.Dmitri Gribenko2012-08-23
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162446 91177308-0d34-0410-b5e6-96231b3b80d8
* Typo.Eric Christopher2012-08-23
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162438 91177308-0d34-0410-b5e6-96231b3b80d8
* Only emit the __debug_inlined section if we're trying to be compatibleEric Christopher2012-08-23
| | | | | | | | with older gdbs on darwin. rdar://10975874 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162436 91177308-0d34-0410-b5e6-96231b3b80d8
generated by cgit v1.2.3 (git 2.25.1) at 2024-06-15 22:45:50 +0000