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* gold plugin: don't report error on non-bitcode (e.g. ELF) files.Ivan Krasin2011-09-12
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139544 91177308-0d34-0410-b5e6-96231b3b80d8
* Thumb2 POP's don't allow the PC as an operand, and PUSH's don't allow the SP ↵Owen Anderson2011-09-12
| | | | | | either. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139542 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert the wrong part of r139528, and fix testcases.Bruno Cardoso Lopes2011-09-12
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139541 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix encoding of PC-relative LDRSHW with an immediate offset.Owen Anderson2011-09-12
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139537 91177308-0d34-0410-b5e6-96231b3b80d8
* Conditionalize indvars tests that rely on SCEV expansion of geps,Andrew Trick2011-09-12
| | | | | | | | which is relevant with canonical IVs. Anything else being checked by these tests is already covered by early CSE. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139535 91177308-0d34-0410-b5e6-96231b3b80d8
* Change a bunch of isVolatile() checks to check for atomic load/store as well.Eli Friedman2011-09-12
| | | | | | | | | | No tests; these changes aren't really interesting in the sense that the logic is the same for volatile and atomic. I believe this completes all of the changes necessary for the optimizer to handle loads and stores correctly. I'm going to try and come up with some additional testing, though. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139533 91177308-0d34-0410-b5e6-96231b3b80d8
* There's no need to add additional predicate operands when converting a tB to ↵Owen Anderson2011-09-12
| | | | | | a tBfar now. Fixes nightly test failures on armv6 Thumb. <rdar://problem/10110404> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139531 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix typo.Eric Christopher2011-09-12
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139530 91177308-0d34-0410-b5e6-96231b3b80d8
* Not sure how CMPPS and CMPPD had already ever worked, I guess it didn't.Bruno Cardoso Lopes2011-09-12
| | | | | | | | | | | | However with this fix it does now. Basically the operand order for the x86 target specific node is not the same as the instruction, but since the intrinsic need that specific order at the instruction definition, just change the order during legalization. Also, there were some wrong invertions of condition codes, such as GE => LE, GT => LT, fix that too. Fix PR10907. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139528 91177308-0d34-0410-b5e6-96231b3b80d8
* Organize a bit the operand names for CMPPS and CMPPDBruno Cardoso Lopes2011-09-12
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139527 91177308-0d34-0410-b5e6-96231b3b80d8
* Realign BLEND patterns to match the general style for patterns in .td file.Bruno Cardoso Lopes2011-09-12
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139526 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix 80-columnsBruno Cardoso Lopes2011-09-12
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139525 91177308-0d34-0410-b5e6-96231b3b80d8
* Port more encoding tests to decoding tests, and correct an improper Thumb2 ↵Owen Anderson2011-09-12
| | | | | | pre-indexed load decoding this uncovered. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139522 91177308-0d34-0410-b5e6-96231b3b80d8
* Removing indvars tests that directly test canonical IVs and nothing else.Andrew Trick2011-09-12
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139518 91177308-0d34-0410-b5e6-96231b3b80d8
* Rename -disable-iv-rewrite to -enable-iv-rewrite=false in preparation for ↵Andrew Trick2011-09-12
| | | | | | default change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139517 91177308-0d34-0410-b5e6-96231b3b80d8
* Add asserts to keep front-ends honest while encoding debug info into LLVM IR ↵Devang Patel2011-09-12
| | | | | | using DIBuilder. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139515 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix mistake in test runline.Eli Friedman2011-09-12
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139505 91177308-0d34-0410-b5e6-96231b3b80d8
* Test case for r139453, WidenIV::GetExtendedOperandRecurrence.Andrew Trick2011-09-12
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139504 91177308-0d34-0410-b5e6-96231b3b80d8
* Add DW_ATE_UTF, which clang started using in my previous commit!Devang Patel2011-09-12
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139503 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove the -compact-regions flag.Jakob Stoklund Olesen2011-09-12
| | | | | | | It has been enabled by default for a while, it was only there to allow performance comparisons. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139501 91177308-0d34-0410-b5e6-96231b3b80d8
* Add an interface for SplitKit complement spill modes.Jakob Stoklund Olesen2011-09-12
| | | | | | | | | | | | | | | | | | | | | | | | | SplitKit always computes a complement live range to cover the places where the original live range was live, but no explicit region has been allocated. Currently, the complement live range is created to be as small as possible - it never overlaps any of the regions. This minimizes register pressure, but if the complement is going to be spilled anyway, that is not very important. The spiller will eliminate redundant spills, and hoist others by making the spill slot live range overlap some of the regions created by splitting. Stack slots are cheap. This patch adds the interface to enable spill modes in SplitKit. In spill mode, SplitKit will assume that the complement is going to spill, so it will allow it to overlap regions in order to avoid back-copies. By doing some of the spiller's work early, the complement live range becomes simpler. In some cases, it can become much simpler because no extra PHI-defs are required. This will speed up both splitting and spilling. This is only the interface to enable spill modes, no implementation yet. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139500 91177308-0d34-0410-b5e6-96231b3b80d8
* Update comments to reflect some (not so) recent changes.Jakob Stoklund Olesen2011-09-12
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139498 91177308-0d34-0410-b5e6-96231b3b80d8
* Associate a MemOperand with LDWCP nodes introduced during ISel.Richard Osborne2011-09-12
| | | | | | | This information is required if we want LDWCP to be hoisted out of loops. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139495 91177308-0d34-0410-b5e6-96231b3b80d8
* Mark LDWCP as having no side effects.Richard Osborne2011-09-12
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139494 91177308-0d34-0410-b5e6-96231b3b80d8
* Format patterns, remove unused X86blend patternsNadav Rotem2011-09-12
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139491 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix disassembling of one of the register/register forms of ↵Craig Topper2011-09-11
| | | | | | MOVUPS/MOVUPD/MOVAPS/MOVAPD/MOVSS/MOVSD and their VEX equivalents. Fixes PR10877. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139486 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix disassembling of reverse register/register forms of ↵Craig Topper2011-09-11
| | | | | | ADD/SUB/XOR/OR/AND/SBB/ADC/CMP/MOV. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139485 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix disassembling of PAUSE instruction. Fixes PR10900. Also fixed NOP ↵Craig Topper2011-09-11
| | | | | | disassembling to ignore OpSize and REX.W. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139484 91177308-0d34-0410-b5e6-96231b3b80d8
* s/SequeuentiallyConsistent/SequentiallyConsistent/gNick Lewycky2011-09-11
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139481 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix verb tense agreement.Nick Lewycky2011-09-11
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139480 91177308-0d34-0410-b5e6-96231b3b80d8
* CR fixes per Bruno's request.Nadav Rotem2011-09-11
| | | | | | | | | Undo the changes from r139285 which added custom lowering to vselect. Add tablegen lowering for vselect. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139479 91177308-0d34-0410-b5e6-96231b3b80d8
* Really un-XFAIL the testcase, like I said I would in r139458.Eli Friedman2011-09-10
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139459 91177308-0d34-0410-b5e6-96231b3b80d8
* r139454 activates an assert in a case where we were doing the right thing ↵Eli Friedman2011-09-10
| | | | | | anyway. Make that explicit, and un-XFAIL the testcase. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139458 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix the asserts in lib/Target/X86/X86ELFWriterInfo.cpp andRichard Trieu2011-09-10
| | | | | | | | | | | | | | lib/ExecutionEngine/MCJIT/MCJIT.cpp from: assert("error"); to: assert(0 && "error"); git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139456 91177308-0d34-0410-b5e6-96231b3b80d8
* Fixed an assert from:Richard Trieu2011-09-10
| | | | | | | | | | | | | | | | assert("not implemented for target shuffle node"); to: assert(0 && "not implemented for target shuffle node"); This causes a test failure in CodeGen/X86/palignr.ll which has been marked as XFAIL for the time being. Test failure filed at PR10901. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139454 91177308-0d34-0410-b5e6-96231b3b80d8
* [disable-iv-rewrite] Allow WidenIV to handle NSW/NUW operationsAndrew Trick2011-09-10
| | | | | | | | | | | | | better. Don't immediately give up when an add operation can't be trivially sign/zero-extended within a loop. If it has NSW/NUW flags, generate a new expression with sign extended (non-recurrent) operand. As before, if SCEV says that all sign extends are loop invariant, then we can widen the operation. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139453 91177308-0d34-0410-b5e6-96231b3b80d8
* Set NSW/NUW flags on SCEVAddExpr when the operation is flagged asAndrew Trick2011-09-10
| | | | | | | | | | | such. I'm doing this now for completeness because I can't think of/remember any reason that it was left out. I'm not sure it will help anything, but if we don't do it we need to explain why in comments. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139450 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix asserts in CodeGen from:Richard Trieu2011-09-10
| | | | | | | | | | | | assert("error"); to: assert(0 && "error"); git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139449 91177308-0d34-0410-b5e6-96231b3b80d8
* Thumb2 parsing and encoding for MOV(immediate).Jim Grosbach2011-09-10
| | | | | | | Some aliases for MOV(register) also to keep existing T1 tests happy when run in thumbv7 mode. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139440 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix test cases.Akira Hatanaka2011-09-09
| | | | | | | Generate code for Mips32r1 unless a Mips32r2 feature is tested. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139433 91177308-0d34-0410-b5e6-96231b3b80d8
* LDM writeback is not allowed if Rn is in the target register list.Owen Anderson2011-09-09
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139432 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix an ambiguously nested if.Owen Anderson2011-09-09
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139431 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix buildbot breakage caused by r139415. I missed one instance of a ↵Owen Anderson2011-09-09
| | | | | | manually create ARM::tB. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139429 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix assembly/disassembly of Thumb2 ADR instructions with immediate operands.Owen Anderson2011-09-09
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139422 91177308-0d34-0410-b5e6-96231b3b80d8
* O64 will not be supported.Akira Hatanaka2011-09-09
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139421 91177308-0d34-0410-b5e6-96231b3b80d8
* Make F31 and D15 non-reserved registers.Akira Hatanaka2011-09-09
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139420 91177308-0d34-0410-b5e6-96231b3b80d8
* tidy up a bitChris Lattner2011-09-09
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139419 91177308-0d34-0410-b5e6-96231b3b80d8
* Thumb unconditional branches are allowed in IT blocks, and therefore should ↵Owen Anderson2011-09-09
| | | | | | have a predicate operand, unlike conditional branches. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139415 91177308-0d34-0410-b5e6-96231b3b80d8
* Update Clang AST attribute reader tblgen generation to match with ASTReader ↵Douglas Gregor2011-09-09
| | | | | | change git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139414 91177308-0d34-0410-b5e6-96231b3b80d8
* Mips32 does not reserve even-numbered floating point registers.Akira Hatanaka2011-09-09
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139412 91177308-0d34-0410-b5e6-96231b3b80d8
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