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path: root/include/llvm/Target
Commit message (Expand)AuthorAge
* Add VectorTargetTransform::getNumberOfParts.Hal Finkel2012-10-26
* add TableGen support to create relationship maps between instructionsSebastian Pop2012-10-25
* Implement a basic cost model for vector and scalar instructions. Nadav Rotem2012-10-24
* Make LegalizeKind public so that we can use it outside of TargetLowering.Nadav Rotem2012-10-24
* Implement a basic VectorTargetTransformInfo interface to be used by the loop ...Nadav Rotem2012-10-24
* Reapply the TargerTransformInfo changes, minus the changes to LSR and Lowerin...Nadav Rotem2012-10-18
* Temporarily revert the TargetTransform changes.Bob Wilson2012-10-18
* Issue:Stepan Dyatkovskiy2012-10-16
* Resubmit the changes to llvm core to update the functions to support differen...Micah Villmow2012-10-15
* Shuffle the virtual destructor down to the base. This should actually pacifyNick Lewycky2012-10-12
* Give this class full of virtual functions a virtual destructor. Classes loveNick Lewycky2012-10-12
* Revert 165732 for further review.Micah Villmow2012-10-11
* Add in the first iteration of support for llvm/clang/lldb to allow variable p...Micah Villmow2012-10-11
* Add a new interface to allow IR-level passes to access codegen-specific infor...Nadav Rotem2012-10-10
* Issue description:Stepan Dyatkovskiy2012-10-10
* misched: Use the TargetSchedModel interface wherever possible.Andrew Trick2012-10-10
* Use the attribute enums to query if a parameter has an attribute.Bill Wendling2012-10-09
* Add in the first step of the multiple pointer support. This adds in support t...Micah Villmow2012-10-09
* whitespaceNadav Rotem2012-10-09
* Refactor the AddrMode class out of TLI to its own header file.Nadav Rotem2012-10-08
* misched: remove the unused getSpecialAddressLatency hook.Andrew Trick2012-10-08
* Move TargetData to DataLayout.Micah Villmow2012-10-08
* Remove extraneous semicolon.Chad Rosier2012-10-05
* Implement TargetData with the DataLayout class, this will allow LLVM projects...Micah Villmow2012-10-05
* This patch corrects commit 165126 by using an integer bit width instead of Preston Gurd2012-10-04
* Use attribute query methods.Bill Wendling2012-10-04
* Added instregex support to TableGen subtarget emitter.Andrew Trick2012-10-03
* TargetData: s/uint32_t/unsigned/ per Kuba's request.Benjamin Kramer2012-10-01
* Shrink TargetAlignElem a bit, we do a lot of searches on them.Benjamin Kramer2012-09-29
* TargetLowering interface to set/get minimum block entries for jump tables.Sebastian Pop2012-09-25
* Machine Model (-schedmodel only). Added SchedAliases.Andrew Trick2012-09-22
* TargetSchedModel API. Implement latency lookup, disabled.Andrew Trick2012-09-18
* TableGen subtarget emitter. Remove unnecessary header dependence.Andrew Trick2012-09-18
* TableGen subtarget emitter. Initialize MCSubtargetInfo with the new machine m...Andrew Trick2012-09-18
* Revert r164061-r164067. Most of the new subtarget emitter.Andrew Trick2012-09-17
* llvm/Target/TargetSubtargetInfo.h: Fix case in #include, s#llvm/Codegen/#llvm...NAKAMURA Takumi2012-09-17
* TargetSchedModel API. Implement latency lookup, disabled.Andrew Trick2012-09-17
* TableGen subtarget emitter. Generate resolveSchedClass generated hook for res...Andrew Trick2012-09-17
* TableGen subtarget emitter. Initialize MCSubtargetInfo with the new machine m...Andrew Trick2012-09-17
* Mark unimplemented copy constructors and copy assignment operators as LLVM_DE...Craig Topper2012-09-17
* whitespaceAndrew Trick2012-09-14
* Add in comments that explain what the indexing and the size of the arrays is ...Micah Villmow2012-09-14
* misched: Generic tablegen classes for the new machine model.Andrew Trick2012-09-14
* commentAndrew Trick2012-09-14
* commentAndrew Trick2012-09-14
* The current implementation does not allow more than 32 types to be properly h...Micah Villmow2012-09-13
* Improve tblgen code cleanliness: create an unknown_class, from which the unkn...Owen Anderson2012-09-11
* Add TRI::getSubRegIndexLaneMask().Jakob Stoklund Olesen2012-09-11
* Add MCRI::getNumSubRegIndices() and start checking SubRegIndex ranges.Jakob Stoklund Olesen2012-09-11
* Tablegen: Add OperandWithDefaultOps Operand typeTom Stellard2012-09-06