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* eliminate the Type::getDescription() method, using "<<" instead. This Chris Lattner2011-06-18
| | | | | | | removes some gunk from LLVMContext. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133360 91177308-0d34-0410-b5e6-96231b3b80d8
* improve some comments.Chris Lattner2011-06-18
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133359 91177308-0d34-0410-b5e6-96231b3b80d8
* Don't allocate empty read-only SmallVectors during SelectionDAG deallocation.Benjamin Kramer2011-06-18
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133348 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove MethodProtos/MethodBodies and allocation_order_begin/end.Jakob Stoklund Olesen2011-06-18
| | | | | | | | | | | | | | Targets that need to change the default allocation order should use the AltOrders mechanism instead. See the X86 and ARM targets for examples. The allocation_order_begin() and allocation_order_end() methods have been replaced with getRawAllocationOrder(), and there is further support functions in RegisterClassInfo. It is no longer possible to insert arbitrary code into generated register classes. This is a feature. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133332 91177308-0d34-0410-b5e6-96231b3b80d8
* Provide AltOrders for specifying alternative allocation orders.Jakob Stoklund Olesen2011-06-18
| | | | | | | | | | | | A register class can define AltOrders and AltOrderSelect instead of defining method protos and bodies. The AltOrders lists can be defined with set operations, and TableGen can verify that the alternative allocation orders only contain valid registers. This is currently an opt-in feature, and it is still possible to override allocation_order_begin/end. That will not be true for long. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133320 91177308-0d34-0410-b5e6-96231b3b80d8
* Use the verbose asm flag instead of a new flag for decoding the LSDA.Bill Wendling2011-06-17
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133292 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix a bug in the type-lowering of integer-promoted elements. Add a check thatNadav Rotem2011-06-17
| | | | | | | | the newly created simple type is valid before checking its legality. Re-commit the test file. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133291 91177308-0d34-0410-b5e6-96231b3b80d8
* Lower multiply with overflow checking to __mulo<mode>Eric Christopher2011-06-17
| | | | | | | | | | calls if we haven't been able to lower them any other way. Fixes rdar://9090077 and rdar://9210061 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133288 91177308-0d34-0410-b5e6-96231b3b80d8
* Add an option that allows one to "decode" the LSDA.Bill Wendling2011-06-17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The LSDA is a bit difficult for the non-initiated to read. Even with comments, it's not always clear what's going on. This wraps the ASM streamer in a class that retains the LSDA and then emits a human-readable description of what's going on in it. So instead of having to make sense of: Lexception1: .byte 255 .byte 155 .byte 168 .space 1 .byte 3 .byte 26 Lset0 = Ltmp7-Leh_func_begin1 .long Lset0 Lset1 = Ltmp812-Ltmp7 .long Lset1 Lset2 = Ltmp913-Leh_func_begin1 .long Lset2 .byte 3 Lset3 = Ltmp812-Leh_func_begin1 .long Lset3 Lset4 = Leh_func_end1-Ltmp812 .long Lset4 .long 0 .byte 0 .byte 1 .byte 0 .byte 2 .byte 125 .long __ZTIi@GOTPCREL+4 .long __ZTIPKc@GOTPCREL+4 you can read this instead: ## Exception Handling Table: Lexception1 ## @LPStart Encoding: omit ## @TType Encoding: indirect pcrel sdata4 ## @TType Base: 40 bytes ## @CallSite Encoding: udata4 ## @Action Table Size: 26 bytes ## Action 1: ## A throw between Ltmp7 and Ltmp812 jumps to Ltmp913 on an exception. ## For type(s): __ZTIi@GOTPCREL+4 __ZTIPKc@GOTPCREL+4 ## Action 2: ## A throw between Ltmp812 and Leh_func_end1 does not have a landing pad. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133286 91177308-0d34-0410-b5e6-96231b3b80d8
* Drop the "2" suffix on some enums.Chris Lattner2011-06-17
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133274 91177308-0d34-0410-b5e6-96231b3b80d8
* remove support for a bunch of obsolete instruction encodingsChris Lattner2011-06-17
| | | | | | | and other backward compatibility hacks. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133273 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove some "2" suffixes from the metadata enums now that "1" is gone.Chris Lattner2011-06-17
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133269 91177308-0d34-0410-b5e6-96231b3b80d8
* remove bitcode reader support for LLVM 2.7 metadata encoding.Chris Lattner2011-06-17
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133268 91177308-0d34-0410-b5e6-96231b3b80d8
* Add a hook for PBQP clients to run a custom pre-alloc pass to run prior to ↵Lang Hames2011-06-17
| | | | | | PBQP allocation. Patch by Arnaud Allard de Grandmaison. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133249 91177308-0d34-0410-b5e6-96231b3b80d8
* Rename TRI::getAllocationOrder() to getRawAllocationOrder().Jakob Stoklund Olesen2011-06-16
| | | | | | | | | | | Also switch the return type to ArrayRef<unsigned> which works out nicely for ARM's implementation of this function because of the clever ArrayRef constructors. The name change indicates that the returned allocation order may contain reserved registers as has been the case for a while. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133216 91177308-0d34-0410-b5e6-96231b3b80d8
* forward declare GraphTraits in Type.h instead of #includ'ing it.Chris Lattner2011-06-16
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133201 91177308-0d34-0410-b5e6-96231b3b80d8
* change Type.h to forward declare ArrayRef instead of #including it.Chris Lattner2011-06-16
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133197 91177308-0d34-0410-b5e6-96231b3b80d8
* move the address space into the subclass data field, saving a word on ↵Chris Lattner2011-06-16
| | | | | | | | | PointerType. This limits the # address spaces to 2^23, which should be good enough. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133192 91177308-0d34-0410-b5e6-96231b3b80d8
* tidy up some comments, store the 'isvararg' bit for FunctionType inChris Lattner2011-06-16
| | | | | | | the SubclassData field, saving a word. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133191 91177308-0d34-0410-b5e6-96231b3b80d8
* remove Type::getVAArgsPromotedType, which is dead, and tidy up a bit.Chris Lattner2011-06-16
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133190 91177308-0d34-0410-b5e6-96231b3b80d8
* Introduce MachineBranchProbabilityInfo class, which has similar API toJakub Staszak2011-06-16
| | | | | | | | | BranchProbabilityInfo (expect setEdgeWeight which is not available here). Branch Weights are kept in MachineBasicBlocks. To turn off this analysis set -use-mbpi=false. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133184 91177308-0d34-0410-b5e6-96231b3b80d8
* Change the REG_SEQUENCE SDNode to take an explict register class ID as its ↵Owen Anderson2011-06-16
| | | | | | | | | first operand. This operand is lowered away by the time we reach MachineInstrs, so the actual register-allocation handling of them doesn't need to change. This is intended to support using REG_SEQUENCE SDNode's with type MVT::untyped, and is part of the long road to eliminating some of the hacks we currently use to support register pairs and other strange constraints, particularly on ARM NEON. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133178 91177308-0d34-0410-b5e6-96231b3b80d8
* Add TargetRegisterInfo::getRawAllocationOrder().Jakob Stoklund Olesen2011-06-16
| | | | | | | | | | | | | This virtual function will replace allocation_order_begin/end as the one to override when implementing custom allocation orders. It is simpler to have one function return an ArrayRef than having two virtual functions computing different ends of the same array. Use getRawAllocationOrder() in place of allocation_order_begin() where it makes sense, but leave some clients that look like they really want the filtered allocation orders from RegisterClassInfo. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133170 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix formatting.Owen Anderson2011-06-16
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133164 91177308-0d34-0410-b5e6-96231b3b80d8
* The ARC language-specific optimizer. Credit to Dan Gohman.John McCall2011-06-15
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133108 91177308-0d34-0410-b5e6-96231b3b80d8
* Add a new MVT::untyped. This will be used in future work for modelling ISA ↵Owen Anderson2011-06-15
| | | | | | features like register pairs and lists with "interesting" constraints (such as ARM NEON contiguous register lists or even-odd paired registers). We need to be able to generate these instructions (often from intrinsics), but don't want to have to assign a legal type to them. Instead, we'll use an "untyped" edge to bypass the type-checking and simply ensure that the register classes match. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133106 91177308-0d34-0410-b5e6-96231b3b80d8
* Use set operations instead of plain lists to enumerate register classes.Jakob Stoklund Olesen2011-06-15
| | | | | | | | | | | | This simplifies many of the target description files since it is common for register classes to be related or contain sequences of numbered registers. I have verified that this doesn't change the files generated by TableGen for ARM and X86. It alters the allocation order of MBlaze GPR and Mips FGR32 registers, but I believe the change is benign. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133105 91177308-0d34-0410-b5e6-96231b3b80d8
* Add a new function attribute, nonlazybind, which inhibits lazy-loadingJohn McCall2011-06-15
| | | | | | | | | | | | | | | | | | optimizations when emitting calls to the function; instead those calls may use faster relocations which require the function to be immediately resolved upon loading the dynamic object featuring the call. This is useful when it is known that the function will be called frequently and pervasively and therefore there is no merit in delaying binding of the function. Currently only implemented for x86-64, where it turns into a call through the global offset table. Patch by Dan Gohman, who assures me that he's going to add LangRef documentation for this once it's committed. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133080 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove unused code.Eli Friedman2011-06-15
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133078 91177308-0d34-0410-b5e6-96231b3b80d8
* Constify PackedVector::reference::operator T().Argyrios Kyrtzidis2011-06-15
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133074 91177308-0d34-0410-b5e6-96231b3b80d8
* Diagnostic for undefined assembler local symbols.Jim Grosbach2011-06-15
| | | | | | | | | | | | | | | | | Re-apply 133010, with fixes for inline assembler. Original commit message: "When an assembler local symbol is used but not defined in a module, a Darwin assembler wants to issue a diagnostic to that effect." Added fix to only perform the check when finalizing, as otherwise we're not done and undefined symbols may simply not have been encountered yet. Passes "make check" and a self-host check on Darwin. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133071 91177308-0d34-0410-b5e6-96231b3b80d8
* Added -stress-sched flag in the Asserts build.Andrew Trick2011-06-15
| | | | | | | Added a test case for handling physreg aliases during pre-RA-sched. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133063 91177308-0d34-0410-b5e6-96231b3b80d8
* Replace the statically generated hashtables for checking register ↵Owen Anderson2011-06-15
| | | | | | | | | | relationships with just scanning the (typically tiny) static lists. At the time I wrote this code (circa 2007), TargetRegisterInfo was using a std::set to perform these queries. Switching to the static hashtables was an obvious improvement, but in reality there's no reason to do anything other than scan. With this change, total LLC time on a whole-program 403.gcc is reduced by approximately 1.5%, almost all of which comes from a 15% reduction in LiveVariables time. It also reduces the binary size of LLC by 86KB, thanks to eliminating a bunch of very large static tables. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133051 91177308-0d34-0410-b5e6-96231b3b80d8
* add option for literal formatting to APInt::toString()Ted Kremenek2011-06-15
| | | | | | | | | | | | | | | toString() now takes an optional bool argument that, depending on the radix, adds the appropriate prefix to the integer's string representation that makes it into a meaningful C literal, e.g.: hexademical: '-f' becomes '-0xf' octal: '77' becomes '077' binary: '110' becomes '0b110' Patch by nobled@dreamwidth.org! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133032 91177308-0d34-0410-b5e6-96231b3b80d8
* Add "unknown" results for memdep, which mean "I don't know whether a ↵Eli Friedman2011-06-15
| | | | | | dependence for the given instruction exists in the given block". This cleans up all the existing hacks in memdep which represent this concept by returning clobber with various unrelated instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133031 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert 133010. Self-hosted buildbot unhappy.Jim Grosbach2011-06-14
| | | | | | | | Apparently llvm itself generates undefined assembler local labels, causing self-hosting problems with this patch. Reverting until that's sorted out. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133013 91177308-0d34-0410-b5e6-96231b3b80d8
* Diagnostic for undefined assembler local symbols.Jim Grosbach2011-06-14
| | | | | | | | | | When an assembler local symbol is used but not defined in a module, a Darwin assembler wants to issue a diagnostic to that effect. rdar://9559714 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133010 91177308-0d34-0410-b5e6-96231b3b80d8
* Add one more argument to the prefetch intrinsic to indicate whether it's a dataBruno Cardoso Lopes2011-06-14
| | | | | | | or instruction cache access. Update the targets to match it and also teach autoupgrade. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132976 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert r132910 and r132909 on behalf of Michael. They didn't build with clang.Benjamin Kramer2011-06-13
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132914 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert the last two commits in the series. r132911, r132912.Michael J. Spencer2011-06-13
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132913 91177308-0d34-0410-b5e6-96231b3b80d8
* Make Binary the parent of ObjectFile and update children to new interface.Michael J. Spencer2011-06-13
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132911 91177308-0d34-0410-b5e6-96231b3b80d8
* Add Binary class. This is a cleaner parent than ObjectFile.Michael J. Spencer2011-06-13
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132910 91177308-0d34-0410-b5e6-96231b3b80d8
* Add Object/Error.Michael J. Spencer2011-06-13
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132909 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix spelling and sort CMakeLists.txt.Michael J. Spencer2011-06-13
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132908 91177308-0d34-0410-b5e6-96231b3b80d8
* Bugfix: When looking for a legal vector type, stop looking when a non-simpleNadav Rotem2011-06-12
| | | | | | | | | element type is found. This fix addresses some of the tests in Duncan's testcase (forthcoming). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132891 91177308-0d34-0410-b5e6-96231b3b80d8
* Tweak hash function and compress hash tables.Jakob Stoklund Olesen2011-06-12
| | | | | | | | | | | | | | | | | Make the hash tables as small as possible while ensuring that all lookups can be done in less than 8 probes. Cut the aliases hash table in half by only storing a < b pairs - it is a symmetric relation. Use larger multipliers on the initial hash function to ensure that it properly covers the whole table, and to resolve some clustering in the very regular ARM register bank. This reduces the size of most of these tables by 4x - 8x. For instance, the ARM tables shrink from 48 KB to 8 KB. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132888 91177308-0d34-0410-b5e6-96231b3b80d8
* Compute lists of sub-regs, super-regs, and overlapping regs.Jakob Stoklund Olesen2011-06-12
| | | | | | | | | | | | | | | | | | | | | | | Besides moving structural computations to CodeGenRegisters.cpp, this also well-defines the order of these lists: - Sub-register lists come from a pre-order traversal of the graph defined by the SubRegs lists in the .td files. - Super-register lists are topologically ordered so no register comes before any of its sub-registers. When the sub-register graph is not a tree, independent super-registers appear in numerical order. - Lists of overlapping registers are ordered according to register number. This reverses the order of the super-regs lists, but nobody was depending on that. The previous order of the overlaps lists was odd, and it may have depended on the precise behavior of std::stable_sort. The old computations are still there, but will be removed shortly. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132881 91177308-0d34-0410-b5e6-96231b3b80d8
* Reformatting. Moving class definitions to more natural places. No ↵Bill Wendling2011-06-11
| | | | | | functionalogical changes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132876 91177308-0d34-0410-b5e6-96231b3b80d8
* Branch profiling: floating-point avoidance.Andrew Trick2011-06-11
| | | | | | | | | | Patch by: Jakub Staszak! Introduces BranchProbability. Changes unsigned to uint32_t all over and uint64_t only when overflow is expected. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132867 91177308-0d34-0410-b5e6-96231b3b80d8
* Provide an ARMCCState subclass of CCState so that ARM clients will always setCameron Zwarich2011-06-10
| | | | | | CallOrPrologue correctly and eliminate the existing setter. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132856 91177308-0d34-0410-b5e6-96231b3b80d8
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