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path: root/lib/CodeGen/MachineScheduler.cpp
Commit message (Expand)AuthorAge
* Confusing comment typo.Andrew Trick2013-08-07
* MI Sched: Track live-thru registers.Andrew Trick2013-07-30
* MI Sched fix: assert "Disconnected LRG within the scheduling region."Andrew Trick2013-07-30
* MI Sched: Register pressure heuristics.Andrew Trick2013-07-25
* Dump LIS before regalloc. MI sched changes them.Andrew Trick2013-07-25
* Fix uninitialized memory read found by MemorySanitizer: always set output par...Alexey Samsonov2013-07-19
* MI Sched: Update the way resources are tracked so the current heuristics make...Andrew Trick2013-07-19
* MI-Sched: cleanup DEBUG output.Andrew Trick2013-06-21
* MI-Sched: Adjust regpressure limits for reserved regs.Andrew Trick2013-06-21
* Give RegMax higher priority.Andrew Trick2013-06-17
* Remove compareRPDelta.Andrew Trick2013-06-17
* MI-Sched: Remove another heuristic that is sensitive to queue order.Andrew Trick2013-06-17
* MI-Sched: Track multiple candidates with the same priority level.Andrew Trick2013-06-17
* Missing NDEBUGs.Andrew Trick2013-06-15
* MI-Sched: heuristics using the new latency and machine model.Andrew Trick2013-06-15
* Machine Model: Add MicroOpBufferSize and resource BufferSize.Andrew Trick2013-06-15
* MI-Sched: Rename IssueCount to CurrMOps.Andrew Trick2013-06-15
* MI-Sched: Remove the temporary EnableCopyConstrain flag.Andrew Trick2013-06-15
* MI-Sched: added tracking of dependent latency for better heuristics.Andrew Trick2013-06-15
* MI-Sched: DEBUG: print critical resource.Andrew Trick2013-06-15
* Move #include from .h to .cpp file.Jakub Staszak2013-06-14
* MI Sched: revert a minor heuristic that snuck in with -misched-vcopy.Andrew Trick2013-04-30
* Fix for r180193 - MI Sched: eliminate local vreg.Andrew Trick2013-04-24
* MI Sched: eliminate local vreg copies.Andrew Trick2013-04-24
* MI Sched: regpressure tracing.Andrew Trick2013-04-24
* MI-Sched: DEBUG formatting.Andrew Trick2013-04-13
* MI-Sched: schedule physreg copies.Andrew Trick2013-04-13
* RegisterPressure heuristics currently require signed comparisons.Andrew Trick2013-04-05
* Disable DFSResult for ConvergingScheduler.Andrew Trick2013-04-05
* MachineScheduler: format DEBUG output.Andrew Trick2013-04-05
* Fix missing std::. Not sure how this compiles for anyone else.Matt Arsenault2013-03-21
* Cleanup #includes.Jakub Staszak2013-03-10
* Add -verify-misched option.Andrew Trick2013-03-08
* Use const reference instead of vector object when passing an argument toJakub Staszak2013-02-16
* MIsched: HazardRecognizers are created for each DAG. Free them.Andrew Trick2013-02-13
* MIsched: cleanup code. Use isBoundaryNode().Andrew Trick2013-01-29
* Use const reference instead of vector copying.Jakub Staszak2013-01-25
* MIsched: Print block name. No functionality.Andrew Trick2013-01-25
* MachineScheduler support for viewGraph.Andrew Trick2013-01-25
* MIsched: Improve the interface to SchedDFS analysis (subtrees).Andrew Trick2013-01-25
* MISched: Add SchedDFSResult to ScheduleDAGMI to formalize theAndrew Trick2013-01-25
* MachineScheduler: enable biasCriticalPath for all DAGs.Andrew Trick2013-01-24
* Follow-up typo correction from building the wrong branch.Andrew Trick2013-01-11
* Fix typo from r170452. Affects -enable-misched heuristics.Andrew Trick2013-01-11
* MIsched: add an ILP window property to machine model.Andrew Trick2013-01-09
* MISched: Cleanup, redundant statement.Andrew Trick2012-12-18
* MISched: Heuristics, compare latency more precisely. It matters more for some...Andrew Trick2012-12-18
* MISched: Remove SchedRemainder::IsResourceLimited. I don't know how to comput...Andrew Trick2012-12-18
* MISched: cleanup, use the proper iterator type.Andrew Trick2012-12-18
* MISched: minor improvement, initialize remaining resources before the first s...Andrew Trick2012-12-18