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path: root/lib/CodeGen/PrologEpilogInserter.cpp
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* Remove dead variableChris Lattner2006-05-12
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28253 91177308-0d34-0410-b5e6-96231b3b80d8
* Foundation for call frame information.Jim Laskey2006-04-07
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27491 91177308-0d34-0410-b5e6-96231b3b80d8
* The stack alignment is now computed dynamically, just verify it is correct.Chris Lattner2006-04-03
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27380 91177308-0d34-0410-b5e6-96231b3b80d8
* Always compute max align.Chris Lattner2005-11-06
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24227 91177308-0d34-0410-b5e6-96231b3b80d8
* Add the necessary support to the ISel to allow targets to codegen the newNate Begeman2005-11-06
| | | | | | | | | alignment information appropriately. Includes code for PowerPC to support fixed-size allocas with alignment larger than the stack. Support for arbitrarily aligned dynamic allocas coming soon. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24224 91177308-0d34-0410-b5e6-96231b3b80d8
* now that we have a reg class to spill with, get this info from the regclassChris Lattner2005-09-30
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23559 91177308-0d34-0410-b5e6-96231b3b80d8
* Now that we have getCalleeSaveRegClasses() info, use it to pass the registerChris Lattner2005-09-30
| | | | | | | class into the spill/reload methods. Targets can now rely on that argument. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23556 91177308-0d34-0410-b5e6-96231b3b80d8
* Change this code ot pass register classes into the stack slot spiller/reloaderChris Lattner2005-09-30
| | | | | | | | code. PrologEpilogInserter hasn't been updated yet though, so targets cannot use this info. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23536 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix a bug in my previous patch that was using the wrong iterator. This fixesChris Lattner2005-08-29
| | | | | | | Olden/bisort among others. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23124 91177308-0d34-0410-b5e6-96231b3b80d8
* Make this code safe for when loadRegFromStackSlot inserts multiple instructions.Chris Lattner2005-08-26
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23108 91177308-0d34-0410-b5e6-96231b3b80d8
* When inserting callee-save register reloads, make sure to skip over anyChris Lattner2005-05-15
| | | | | | | | terminator instructions before the 'ret' in case the target has a multi-instruction return sequence. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22041 91177308-0d34-0410-b5e6-96231b3b80d8
* Tolerate instrs with extra argsChris Lattner2005-05-13
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21982 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove trailing whitespaceMisha Brukman2005-04-21
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21420 91177308-0d34-0410-b5e6-96231b3b80d8
* Simplify/speedup the PEI by not having to scan for uses of the callee savedChris Lattner2005-01-23
| | | | | | | | registers. This information is computed directly by the register allocator now. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19795 91177308-0d34-0410-b5e6-96231b3b80d8
* Speed this up a bit by making ModifiedRegs a vector<char> not vector<bool>Chris Lattner2005-01-23
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19787 91177308-0d34-0410-b5e6-96231b3b80d8
* Implicitly defined registers can clobber callee saved registers too!Chris Lattner2005-01-22
| | | | | | | This fixes the return-address-not-being-saved problem in the Alpha backend. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19741 91177308-0d34-0410-b5e6-96231b3b80d8
* Add an assertion that would have made more sense to duraidChris Lattner2005-01-19
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19704 91177308-0d34-0410-b5e6-96231b3b80d8
* Put this change back in after testing from Reid proved its innocence. ↵Nate Begeman2004-08-29
| | | | | | getSpillSize now returns value in bits git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16102 91177308-0d34-0410-b5e6-96231b3b80d8
* Back out change to divide getSpillSize by 8 until I figure out why it breaks ↵Nate Begeman2004-08-27
| | | | | | x86, which has register sizes in bits. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16073 91177308-0d34-0410-b5e6-96231b3b80d8
* Register sizes are in bits, not bytesNate Begeman2004-08-27
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16070 91177308-0d34-0410-b5e6-96231b3b80d8
* Register info alignment is in bits, frame object alignment is (currently) inChris Lattner2004-08-21
| | | | | | | bytes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15970 91177308-0d34-0410-b5e6-96231b3b80d8
* Now that we have per-register spill size/alignment info, remove more usesChris Lattner2004-08-21
| | | | | | | of getRegClass git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15967 91177308-0d34-0410-b5e6-96231b3b80d8
* Stop using CreateStackObject(RegClass*)Chris Lattner2004-08-15
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15775 91177308-0d34-0410-b5e6-96231b3b80d8
* These methods no longer take a TargetRegisterClass* operand.Chris Lattner2004-08-15
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15774 91177308-0d34-0410-b5e6-96231b3b80d8
* Make this compile on gc 3.4.1 (static_cast to non-const type was notAlkis Evlogimenos2004-08-15
| | | | | | | allowed). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15766 91177308-0d34-0410-b5e6-96231b3b80d8
* Elminiate MachineFunction& argument from eliminateFrameIndexNate Begeman2004-08-14
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15736 91177308-0d34-0410-b5e6-96231b3b80d8
* Split saveCallerSavedRegisters into two methods for clarity, and add comments.Chris Lattner2004-08-12
| | | | | | | | | Add support for targets that must spill certain physregs at certain locations. Patch contributed by Nate Begeman, slightly hacked by me. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15701 91177308-0d34-0410-b5e6-96231b3b80d8
* Ok get rid of the REST of the tabsChris Lattner2004-08-07
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15564 91177308-0d34-0410-b5e6-96231b3b80d8
* Death to tabsChris Lattner2004-08-07
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15563 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix fallout from getOffsetOfLocalArea() being negated. Debugging dumps were ↵Chris Lattner2004-06-11
| | | | | | | | | | being printed incorrectly, and we were reserving 8 extra bytes of stack space for functions on X86. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14152 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix the prolog epilog code inserter to match the documentation and supportChris Lattner2004-06-10
| | | | | | | | | targets whose stack grows up. Patch contributed by Vladimir Prus git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14111 91177308-0d34-0410-b5e6-96231b3b80d8
* Adjust to new TargetMachine interfaceChris Lattner2004-06-02
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@13956 91177308-0d34-0410-b5e6-96231b3b80d8
* Make dense maps keyed on physical registers smallerusingAlkis Evlogimenos2004-02-15
| | | | | | | | | | | MRegisterInfo::getNumRegs() instead of MRegisterInfo::FirstVirtualRegister. Also use MRegisterInfo::is{Physical,Virtual}Register where appropriate. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11477 91177308-0d34-0410-b5e6-96231b3b80d8
* Allow for fixed objects to reside in the local area, and if they don't to notChris Lattner2004-02-15
| | | | | | | clobber them by allocating other objects in the same space! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11454 91177308-0d34-0410-b5e6-96231b3b80d8
* There is no reason to align the stack pointer if there are no callees of ↵Chris Lattner2004-02-14
| | | | | | this function! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11449 91177308-0d34-0410-b5e6-96231b3b80d8
* Change MachineBasicBlock's vector of MachineInstr pointers into anAlkis Evlogimenos2004-02-12
| | | | | | | | | | ilist of MachineInstr objects. This allows constant time removal and insertion of MachineInstr instances from anywhere in each MachineBasicBlock. It also allows for constant time splicing of MachineInstrs into or out of MachineBasicBlocks. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11340 91177308-0d34-0410-b5e6-96231b3b80d8
* Do not use MachineOperand::isVirtualRegister either!Chris Lattner2004-02-10
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11283 91177308-0d34-0410-b5e6-96231b3b80d8
* Eliminate users of MachineOperand::isPhysicalRegisterChris Lattner2004-02-10
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11278 91177308-0d34-0410-b5e6-96231b3b80d8
* Change interface of MachineOperand as follows:Alkis Evlogimenos2003-12-14
| | | | | | | | | | | | | | | | a) remove opIsUse(), opIsDefOnly(), opIsDefAndUse() b) add isUse(), isDef() c) rename opHiBits32() to isHiBits32(), opLoBits32() to isLoBits32(), opHiBits64() to isHiBits64(), opLoBits64() to isLoBits64(). This results to much more readable code, for example compare "op.opIsDef() || op.opIsDefAndUse()" to "op.isDef()" a pattern used very often in the code. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@10461 91177308-0d34-0410-b5e6-96231b3b80d8
* Put all LLVM code into the llvm namespace, as per bug 109.Brian Gaeke2003-11-11
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* Added LLVM project notice to the top of every C++ source file.John Criswell2003-10-20
| | | | | | | Header files will be on the way. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@9298 91177308-0d34-0410-b5e6-96231b3b80d8
* Change MRegisterDesc::AliasSet, TargetInstrDescriptor::ImplicitDefsAlkis Evlogimenos2003-10-08
| | | | | | | | | | | | | | | | | | | | | | and TargetInstrDescriptor::ImplicitUses to always point to a null terminated array and never be null. So there is no need to check for pointer validity when iterating over those sets. Code that looked like: if (const unsigned* AS = TID.ImplicitDefs) { for (int i = 0; AS[i]; ++i) { // use AS[i] } } was changed to: for (const unsigned* AS = TID.ImplicitDefs; *AS; ++AS) { // use *AS } git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@8960 91177308-0d34-0410-b5e6-96231b3b80d8
* Factory methods for FunctionPasses now return type FunctionPass *.Brian Gaeke2003-08-13
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* (1) Added special register class containing (for now) %fsr.Vikram S. Adve2003-05-27
| | | | | | | | | | | | | | Fixed spilling of %fcc[0-3] which are part of %fsr. (2) Moved some machine-independent reg-class code to class TargetRegInfo from SparcReg{Class,}Info. (3) Renamed MachienOperand::opIsDef to MachineOperand::opIsDefOnly() and related functions and flags. Fixed several bugs where only "isDef" was being checked, not "isDefAndUse". git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6341 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix a bug which occurred with empty basic blocksChris Lattner2003-05-02
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5982 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix problems with empty basic blocksChris Lattner2003-01-16
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5326 91177308-0d34-0410-b5e6-96231b3b80d8
* Arg, fix bugs in previous checkin...Chris Lattner2003-01-16
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5322 91177308-0d34-0410-b5e6-96231b3b80d8
* Add assertionChris Lattner2003-01-16
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5321 91177308-0d34-0410-b5e6-96231b3b80d8
* * Insert prolog/epilog code before rewriting indexesChris Lattner2003-01-15
| | | | | | | * Fix calculation of frame offsets when there is an offset. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5318 91177308-0d34-0410-b5e6-96231b3b80d8
* Rename MachineInstrInfo -> TargetInstrInfoChris Lattner2003-01-14
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5272 91177308-0d34-0410-b5e6-96231b3b80d8
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