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CodeGen
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ScheduleDAG.cpp
Commit message (
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Author
Age
*
Fix known typos
Alp Toker
2014-01-24
*
Use SmallVectorImpl instead of SmallVector for iterators and references to av...
Craig Topper
2013-07-03
*
Scheduler diagnostics. Print the register name.
Andrew Trick
2013-03-01
*
Instructions schedulers should report correct height/depth.
Andrew Trick
2013-03-01
*
Replace loop with std::find.
Benjamin Kramer
2013-02-16
*
MIsched: Added biasCriticalPath.
Andrew Trick
2013-01-24
*
Use the new script to sort the includes of every file under lib.
Chandler Carruth
2012-12-03
*
misched: Don't consider artificial edges weak edges.
Andrew Trick
2012-11-13
*
misched: Infrastructure for weak DAG edges.
Andrew Trick
2012-11-12
*
Release build: guard dump functions with
Manman Ren
2012-09-11
*
Release build: guard dump functions with "ifndef NDEBUG"
Manman Ren
2012-09-06
*
sched: Avoid trivially redundant DAG edges. Take the one with higher latency.
Andrew Trick
2012-06-13
*
misched preparation: clarify ScheduleDAG and ScheduleDAGInstrs roles.
Andrew Trick
2012-03-07
*
misched preparation: modularize schedule printing.
Andrew Trick
2012-03-07
*
misched preparation: modularize schedule verification.
Andrew Trick
2012-03-07
*
Don't print out pointer values in SUnit::dump().
Jakob Stoklund Olesen
2012-02-17
*
misched: Initial code for building an MI level scheduling DAG
Andrew Trick
2012-01-14
*
Unweaken vtables as per http://llvm.org/docs/CodingStandards.html#ll_virtual_...
David Blaikie
2011-12-20
*
Make a bunch of symbols private.
Benjamin Kramer
2011-08-19
*
Silence a bunch (but not all) "variable written but not read" warnings
Duncan Sands
2011-08-12
*
- Rename TargetInstrDesc, TargetOperandInfo to MCInstrDesc and MCOperandInfo and
Evan Cheng
2011-06-28
*
Added -stress-sched flag in the Asserts build.
Andrew Trick
2011-06-15
*
Fix a ton of comment typos found by codespell. Patch by
Chris Lattner
2011-04-15
*
Introducing a new method of tracking register pressure. We can't
Andrew Trick
2011-02-04
*
Fix a few cases where the scheduler is not checking for phys reg copies. The ...
Andrew Trick
2010-12-24
*
Various bits of framework needed for precise machine-level selection
Andrew Trick
2010-12-24
*
reduce indentation, no functionality change.
Chris Lattner
2010-12-20
*
Remove trailing whitespace, no functionality changes.
John Mosby
2010-06-30
*
Remove unused member variable.
Zhongxing Xu
2010-05-17
*
Delete an unused member variable.
Dan Gohman
2010-04-13
*
Change errs() to dbgs().
David Greene
2010-01-05
*
Remove some old experimental code that is no longer needed. Remove additional...
David Goodwin
2009-11-20
*
Rename registers to break output dependencies in addition to anti-dependencies.
David Goodwin
2009-11-12
*
Do a scheduling pass ignoring anti-dependencies to identify candidate registe...
David Goodwin
2009-11-03
*
Fix integer overflow in instruction scheduling. This can happen if we have
Reid Kleckner
2009-09-30
*
Convert DOUT to DEBUG(errs()...).
Bill Wendling
2009-08-22
*
Add some debug output.
David Goodwin
2009-08-11
*
Move to raw_ostream.
Daniel Dunbar
2009-07-24
*
When scheduling a block in parts, keep track of the overall
Dan Gohman
2009-02-11
*
Use iterators to iterate through the Preds array instead of
Dan Gohman
2009-02-11
*
Factor out more code for computing register live-range informationfor
Dan Gohman
2009-02-10
*
Instead of adding dependence edges between terminator instructions
Dan Gohman
2009-01-16
*
Generalize the HazardRecognizer interface so that it can be used
Dan Gohman
2009-01-15
*
Move a few containers out of ScheduleDAGInstrs::BuildSchedGraph
Dan Gohman
2009-01-15
*
Avoid referring to edge D after the Succs or Preds arrays have
Dan Gohman
2009-01-13
*
Don't call setDepthDirty/setHeightDirty when adding an edge
Dan Gohman
2009-01-05
*
Minor code simplifications.
Dan Gohman
2008-12-23
*
Optimize setDepthDirty and setHeightDirty a little, as they showed
Dan Gohman
2008-12-22
*
Use SmallVector's pop_back_val.
Dan Gohman
2008-12-20
*
Use the correct Preds and Succs lists in setHeightDirty()
Dan Gohman
2008-12-20
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