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path: root/lib/CodeGen/ScheduleDAGInstrs.cpp
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* Revert "Introduce a string_ostream string builder facilty"Alp Toker2014-06-26
| | | | | | Temporarily back out commits r211749, r211752 and r211754. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211814 91177308-0d34-0410-b5e6-96231b3b80d8
* Introduce a string_ostream string builder faciltyAlp Toker2014-06-26
| | | | | | | | | | | | | | | | | | | | string_ostream is a safe and efficient string builder that combines opaque stack storage with a built-in ostream interface. small_string_ostream<bytes> additionally permits an explicit stack storage size other than the default 128 bytes to be provided. Beyond that, storage is transferred to the heap. This convenient class can be used in most places an std::string+raw_string_ostream pair or SmallString<>+raw_svector_ostream pair would previously have been used, in order to guarantee consistent access without byte truncation. The patch also converts much of LLVM to use the new facility. These changes include several probable bug fixes for truncated output, a programming error that's no longer possible with the new interface. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211749 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix typosAlp Toker2014-05-15
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208839 91177308-0d34-0410-b5e6-96231b3b80d8
* [Modules] Remove potential ODR violations by sinking the DEBUG_TYPEChandler Carruth2014-04-22
| | | | | | | | | | | | define below all header includes in the lib/CodeGen/... tree. While the current modules implementation doesn't check for this kind of ODR violation yet, it is likely to grow support for it in the future. It also removes one layer of macro pollution across all the included headers. Other sub-trees will follow. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206837 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove seemingly-unneeded artificial dependencyHal Finkel2014-04-21
| | | | | | | | | | | | | | | | The rationale for this artificial dependency seems to have been lost to the ravages of time, it is covered by no regression tests, and has no impact on test-suite performance numbers on either x86 or PPC. For the test suite, on both x86 and PPC, I ran the test suite 10 times (both as a baseline and with this change), and found no statistically-significant changes. For PPC, I used a P7 box. For x86, I used an Intel Xeon E5430. Both with -O3 -mcpu=native. This was discussed on-list back in January, but I've not had a chance to run the performance tests until today. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206795 91177308-0d34-0410-b5e6-96231b3b80d8
* Better comments to explain buffered/unbuffered processor resources.Andrew Trick2014-04-18
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206625 91177308-0d34-0410-b5e6-96231b3b80d8
* Break PseudoSourceValue out of the Value hierarchy. It is now the root of ↵Nick Lewycky2014-04-15
| | | | | | its own tree containing FixedStackPseudoSourceValue (which you can use isa/dyn_cast on) and MipsCallEntry (which you can't). Anything that needs to use either a PseudoSourceValue* and Value* is strongly encouraged to use a MachinePointerInfo instead. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206255 91177308-0d34-0410-b5e6-96231b3b80d8
* [C++11] More 'nullptr' conversion. In some cases just using a boolean check ↵Craig Topper2014-04-14
| | | | | | instead of comparing to nullptr. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206142 91177308-0d34-0410-b5e6-96231b3b80d8
* Reenable use of TBAA during CodeGenHal Finkel2014-04-12
| | | | | | | | | | | | | | | | | | | | We had disabled use of TBAA during CodeGen (even when otherwise using AA) because the ptrtoint/inttoptr used by CGP for address sinking caused BasicAA to miss basic type punning that it should catch (and, thus, we'd fail to override TBAA when we should). However, when AA is in use during CodeGen, CGP now uses normal GEPs and bitcasts, instead of ptrtoint/inttoptr, when doing address sinking. As a result, BasicAA should be able to make us do the right thing in the face of type-punning, and it seems safe to enable use of TBAA again. self-hosting seems fine on PPC64/Linux on the P7, with TBAA enabled and -misched=shuffle. Note: We still don't update TBAA when merging stack slots, although because BasicAA should now catch all such cases, this is no longer a blocking issue. Nevertheless, I plan to commit code to deal with this properly in the near future. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206093 91177308-0d34-0410-b5e6-96231b3b80d8
* Replace PROLOG_LABEL with a new CFI_INSTRUCTION.Rafael Espindola2014-03-07
| | | | | | | | | | | | | | | | | | | | | | | The old system was fairly convoluted: * A temporary label was created. * A single PROLOG_LABEL was created with it. * A few MCCFIInstructions were created with the same label. The semantics were that the cfi instructions were mapped to the PROLOG_LABEL via the temporary label. The output position was that of the PROLOG_LABEL. The temporary label itself was used only for doing the mapping. The new CFI_INSTRUCTION has a 1:1 mapping to MCCFIInstructions and points to one by holding an index into the CFI instructions of this function. I did consider removing MMI.getFrameInstructions completelly and having CFI_INSTRUCTION own a MCCFIInstruction, but MCCFIInstructions have non trivial constructors and destructors and are somewhat big, so the this setup is probably better. The net result is that we don't create temporary labels that are never used. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203204 91177308-0d34-0410-b5e6-96231b3b80d8
* [C++11] Replace llvm::next and llvm::prior with std::next and std::prev.Benjamin Kramer2014-03-02
| | | | | | Remove the old functions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202636 91177308-0d34-0410-b5e6-96231b3b80d8
* Indent this continued line.Nick Lewycky2014-02-25
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202096 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix change in behaviour accidentally introduced in r201754.Nick Lewycky2014-02-20
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201758 91177308-0d34-0410-b5e6-96231b3b80d8
* Simplify the implementation of getUnderlyingObjectsForInstr, without ↵Nick Lewycky2014-02-20
| | | | | | intending to change the semantics at all. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201754 91177308-0d34-0410-b5e6-96231b3b80d8
* Disable the use of TBAA when using AA in CodeGenHal Finkel2014-01-25
| | | | | | | | | | | | | | | | | There are currently two issues, of which I currently know, that prevent TBAA from being correctly usable in CodeGen: 1. Stack coloring does not update TBAA when merging allocas. This is easy enough to fix, but is not the largest problem. 2. CGP inserts ptrtoint/inttoptr pairs when sinking address computations. Because BasicAA does not handle inttoptr, we'll often miss basic type punning idioms that we need to catch so we don't miscompile real-world code (like LLVM). I don't yet have a small test case for this, but this fixes self hosting a non-asserts build of LLVM on PPC64 when using -enable-aa-sched-mi and -misched=shuffle. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200093 91177308-0d34-0410-b5e6-96231b3b80d8
* Track multiple stores per object when using AA in ScheduleDAGInstrsHal Finkel2014-01-20
| | | | | | | | | | | | | | | | | | | When using AA to break false chain dependencies, we need to track multiple stores per object in ScheduleDAGInstrs. Historically, we tracked potential alias chains at the object level, and so all loads of an object would retain dependencies on any store to that object. With AA, however, this is not sufficient: non-overlapping stores and loads to the same object all need to be tested for dependencies separately, we cannot only test all loads to an object against only the last store (see PR18497 for an explicit example). To mitigate any unwelcome compile-time impact when not using AA, only one store is kept in the list per object when not using AA. This, along with a stack coloring change to come shortly, will provide a test case, fix PR18497 (and allow LLVM to compile itself using -enable-aa-sched-mi on x86-64). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199657 91177308-0d34-0410-b5e6-96231b3b80d8
* Conservatively handle multiple MMOs in MIsNeedChainEdgeHal Finkel2014-01-08
| | | | | | | | | | | | | | | | | | | | | | MIsNeedChainEdge, which is used by -enable-aa-sched-mi (AA in misched), had an llvm_unreachable when -enable-aa-sched-mi is enabled and we reach an instruction with multiple MMOs. Instead, return a conservative answer. This allows testing -enable-aa-sched-mi on x86. Also, this moves the check above the isUnsafeMemoryObject checks. isUnsafeMemoryObject is currently correct only for instructions with one MMO (as noted in the comment in isUnsafeMemoryObject): // We purposefully do no check for hasOneMemOperand() here // in hope to trigger an assert downstream in order to // finish implementation. The problem with this is that, had the candidate edge passed the "!MIa->mayStore() && !MIb->mayStore()" check, the hoped-for assert would never happen (which could, in theory, lead to incorrect behavior if one of these secondary MMOs was volatile, for example). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198795 91177308-0d34-0410-b5e6-96231b3b80d8
* Move the PostRA scheduler's fixupKills function for reuse.Andrew Trick2013-12-28
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198121 91177308-0d34-0410-b5e6-96231b3b80d8
* MI-Sched: Model "reserved" processor resources.Andrew Trick2013-12-05
| | | | | | | | | | | | | | | | | | | This allows a target to use MI-Sched as an in-order scheduler that will model strict resource conflicts without defining a processor itinerary. Instead, the target can now use the new per-operand machine model and define in-order resources with BufferSize=0. For example, this would allow restricting the type of operations that can be formed into a dispatch group. (Normally NumMicroOps is sufficient to enforce dispatch groups). If the intent is to model latency in in-order pipeline, as opposed to resource conflicts, then a resource with BufferSize=1 should be defined instead. This feature is only casually tested as there are no in-tree targets using it yet. However, Hal will be experimenting with POWER7. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196517 91177308-0d34-0410-b5e6-96231b3b80d8
* MI-Sched: handle latency of in-order operations with the new machine model.Andrew Trick2013-12-05
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The per-operand machine model allows the target to define "unbuffered" processor resources. This change is a quick, cheap way to model stalls caused by the latency of operations that use such resources. This only applies when the processor's micro-op buffer size is non-zero (Out-of-Order). We can't precisely model in-order stalls during out-of-order execution, but this is an easy and effective heuristic. It benefits cortex-a9 scheduling when using the new machine model, which is not yet on by default. MI-Sched for armv7 was evaluated on Swift (and only not enabled because of a performance bug related to predication). However, we never evaluated Cortex-A9 performance on MI-Sched in its current form. This change adds MI-Sched functionality to reach performance goals on A9. The only remaining change is to allow MI-Sched to run as a PostRA pass. I evaluated performance using a set of options to estimate the performance impact once MI sched is default on armv7: -mcpu=cortex-a9 -disable-post-ra -misched-bench -scheditins=false For a simple saxpy loop I see a 1.7x speedup. Here are the llvm-testsuite results: (min run time over 2 runs, filtering tiny changes) Speedups: | Benchmarks/BenchmarkGame/recursive | 52.39% | | Benchmarks/VersaBench/beamformer | 20.80% | | Benchmarks/Misc/pi | 19.97% | | Benchmarks/Misc/mandel-2 | 19.95% | | SPEC/CFP2000/188.ammp | 18.72% | | Benchmarks/McCat/08-main/main | 18.58% | | Benchmarks/Misc-C++/Large/sphereflake | 18.46% | | Benchmarks/Olden/power | 17.11% | | Benchmarks/Misc-C++/mandel-text | 16.47% | | Benchmarks/Misc/oourafft | 15.94% | | Benchmarks/Misc/flops-7 | 14.99% | | Benchmarks/FreeBench/distray | 14.26% | | SPEC/CFP2006/470.lbm | 14.00% | | mediabench/mpeg2/mpeg2dec/mpeg2decode | 12.28% | | Benchmarks/SmallPT/smallpt | 10.36% | | Benchmarks/Misc-C++/Large/ray | 8.97% | | Benchmarks/Misc/fp-convert | 8.75% | | Benchmarks/Olden/perimeter | 7.10% | | Benchmarks/Bullet/bullet | 7.03% | | Benchmarks/Misc/mandel | 6.75% | | Benchmarks/Olden/voronoi | 6.26% | | Benchmarks/Misc/flops-8 | 5.77% | | Benchmarks/Misc/matmul_f64_4x4 | 5.19% | | Benchmarks/MiBench/security-rijndael | 5.15% | | Benchmarks/Misc/flops-6 | 5.10% | | Benchmarks/Olden/tsp | 4.46% | | Benchmarks/MiBench/consumer-lame | 4.28% | | Benchmarks/Misc/flops-5 | 4.27% | | Benchmarks/mafft/pairlocalalign | 4.19% | | Benchmarks/Misc/himenobmtxpa | 4.07% | | Benchmarks/Misc/lowercase | 4.06% | | SPEC/CFP2006/433.milc | 3.99% | | Benchmarks/tramp3d-v4 | 3.79% | | Benchmarks/FreeBench/pifft | 3.66% | | Benchmarks/Ptrdist/ks | 3.21% | | Benchmarks/Adobe-C++/loop_unroll | 3.12% | | SPEC/CINT2000/175.vpr | 3.12% | | Benchmarks/nbench | 2.98% | | SPEC/CFP2000/183.equake | 2.91% | | Benchmarks/Misc/perlin | 2.85% | | Benchmarks/Misc/flops-1 | 2.82% | | Benchmarks/Misc-C++-EH/spirit | 2.80% | | Benchmarks/Misc/flops-2 | 2.77% | | Benchmarks/NPB-serial/is | 2.42% | | Benchmarks/ASC_Sequoia/CrystalMk | 2.33% | | Benchmarks/BenchmarkGame/n-body | 2.28% | | Benchmarks/SciMark2-C/scimark2 | 2.27% | | Benchmarks/Olden/bh | 2.03% | | skidmarks10/skidmarks | 1.81% | | Benchmarks/Misc/flops | 1.72% | Slowdowns: | Benchmarks/llubenchmark/llu | -14.14% | | Benchmarks/Polybench/stencils/seidel-2d | -5.67% | | Benchmarks/Adobe-C++/functionobjects | -5.25% | | Benchmarks/Misc-C++/oopack_v1p8 | -5.00% | | Benchmarks/Shootout/hash | -2.35% | | Benchmarks/Prolangs-C++/ocean | -2.01% | | Benchmarks/Polybench/medley/floyd-warshall | -1.98% | | Polybench/linear-algebra/kernels/3mm | -1.95% | | Benchmarks/McCat/09-vor/vor | -1.68% | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196516 91177308-0d34-0410-b5e6-96231b3b80d8
* Correct word hyphenationsAlp Toker2013-12-05
| | | | | | | This patch tries to avoid unrelated changes other than fixing a few hyphen-related ambiguities and contractions in nearby lines. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196471 91177308-0d34-0410-b5e6-96231b3b80d8
* Pass LiveQueryResult by valueMatthias Braun2013-10-10
| | | | | | | This makes the API a bit more natural to use and makes it easier to make LiveRanges implementation details private. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192394 91177308-0d34-0410-b5e6-96231b3b80d8
* mi-sched: bypass heuristic checks when regpressure tracking is disabled.Andrew Trick2013-09-04
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189988 91177308-0d34-0410-b5e6-96231b3b80d8
* mi-sched: update PressureDiffs on-the-fly for liveness.Andrew Trick2013-08-30
| | | | | | | This removes all expensive pressure tracking logic from the scheduling critical path of node comparison. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189643 91177308-0d34-0410-b5e6-96231b3b80d8
* mi-sched: Precompute a PressureDiff for each instruction, adjust for ↵Andrew Trick2013-08-30
| | | | | | | | | | | | | liveness later. Created SUPressureDiffs array to hold the per node PDiff computed during DAG building. Added a getUpwardPressureDelta API that will soon replace the old one. Compute PressureDelta here from the precomputed PressureDiffs. Updating for liveness will come next. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189640 91177308-0d34-0410-b5e6-96231b3b80d8
* Comment and revise the cyclic critical path code.Andrew Trick2013-08-29
| | | | | | This should be much more clear now. It's still disabled pending testing. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189597 91177308-0d34-0410-b5e6-96231b3b80d8
* Add useAA() to TargetSubtargetInfoHal Finkel2013-08-29
| | | | | | | | | | | | | There are several optional (off-by-default) features in CodeGen that can make use of alias analysis. These features are important for generating code for some kinds of cores (for example the (in-order) PPC A2 core). This adds a useAA() function to TargetSubtargetInfo to allow these features to be enabled by default on a per-subtarget basis. Here is the first use of this function: To control the default of the -enable-aa-sched-mi feature. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189563 91177308-0d34-0410-b5e6-96231b3b80d8
* Adds cyclic critical path computation and heuristics, temporarily disabled.Andrew Trick2013-08-23
| | | | | | | | | | | Estimate the cyclic critical path within a single block loop. If the acyclic critical path is longer, then the loop will exhaust OOO resources after some number of iterations. If lag between the acyclic critical path and cyclic critical path is longer the the time it takes to issue those loop iterations, then aggressively schedule for latency. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189120 91177308-0d34-0410-b5e6-96231b3b80d8
* MI Sched: record local vreg uses.Andrew Trick2013-08-23
| | | | | | | | | This will be used to compute the cyclic critical path and to update precomputed per-node pressure differences. In the longer term, it could also be used to speed up LiveInterval update by avoiding visiting all global vreg users. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189118 91177308-0d34-0410-b5e6-96231b3b80d8
* mi-sched: Don't call MBB.size() in initSUnits. The driver already has instr ↵Andrew Trick2013-08-23
| | | | | | | | | count. This fixes a pathological compile time problem with very large blocks and lots of scheduling boundaries. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189116 91177308-0d34-0410-b5e6-96231b3b80d8
* Use SmallVectorImpl instead of SmallVector for iterators and references to ↵Craig Topper2013-07-03
| | | | | | avoid specifying the vector size unnecessarily. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185512 91177308-0d34-0410-b5e6-96231b3b80d8
* misched: Compress pairs returned by getUnderlyingObjectsForInstr.Benjamin Kramer2013-06-29
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185266 91177308-0d34-0410-b5e6-96231b3b80d8
* Machine Model: Add MicroOpBufferSize and resource BufferSize.Andrew Trick2013-06-15
| | | | | | | | | | | | | Replace the ill-defined MinLatency and ILPWindow properties with with straightforward buffer sizes: MCSchedMode::MicroOpBufferSize MCProcResourceDesc::BufferSize These can be used to more precisely model instruction execution if desired. Disabled some misched tests temporarily. They'll be reenabled in a few commits. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184032 91177308-0d34-0410-b5e6-96231b3b80d8
* MI-Sched: schedule physreg copies.Andrew Trick2013-04-13
| | | | | | | | | | | The register allocator expects minimal physreg live ranges. Schedule physreg copies accordingly. This is slightly tricky when they occur in the middle of the scheduling region. For now, this is handled by rescheduling the copy when its associated instruction is scheduled. Eventually we may instead bundle them, but only if we can preserve the bundles as parallel copies during regalloc. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179449 91177308-0d34-0410-b5e6-96231b3b80d8
* Equal treatment of labels and other terminators in MI DAG construction.Sergei Larin2013-02-12
| | | | | | | | | MI sched DAG construction allows targets to include terminators into scheduling DAG. Extend this functionality to labels as well. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174977 91177308-0d34-0410-b5e6-96231b3b80d8
* ScheduleDAG: colorize the DOT graph and improve formatting.Andrew Trick2013-01-25
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@173431 91177308-0d34-0410-b5e6-96231b3b80d8
* ScheduleDAG: Added isBoundaryNode to conveniently detect a common corner case.Andrew Trick2013-01-25
| | | | | | This fixes DAG subtree analysis at the boundary. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@173427 91177308-0d34-0410-b5e6-96231b3b80d8
* SchedDFS: Complete support for nested subtrees.Andrew Trick2013-01-25
| | | | | | | | | Maintain separate per-node and per-tree book-keeping. Track all instructions above a DAG node including nested subtrees. Seperately track instructions within a subtree. Record subtree parents. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@173426 91177308-0d34-0410-b5e6-96231b3b80d8
* MIsched: Improve the interface to SchedDFS analysis (subtrees).Andrew Trick2013-01-25
| | | | | | | Allow the strategy to select SchedDFS. Allow the results of SchedDFS to affect initialization of the scheduler state. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@173425 91177308-0d34-0410-b5e6-96231b3b80d8
* SchedDFS: Initial support for nested subtrees.Andrew Trick2013-01-25
| | | | | | | This is mostly refactoring, along with adding an instruction count within the subtrees and ensuring we only look at data edges. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@173420 91177308-0d34-0410-b5e6-96231b3b80d8
* SchedDFS: Refactor and tweak the subtree selection criteria.Andrew Trick2013-01-25
| | | | | | | | | | For sanity, create a root when NumDataSuccs >= 4. Splitting large subtrees will no longer be detrimental after my next checkin to handle nested tree. A magic number of 4 is fine because single subtrees seldom rejoin more than this. It makes subtrees easier to visualize and heuristics more sane. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@173399 91177308-0d34-0410-b5e6-96231b3b80d8
* Introduce a new data structure, the SparseMultiSet, and changes to the MI ↵Michael Ilseman2013-01-21
| | | | | | | | | | scheduler to use it. A SparseMultiSet adds multiset behavior to SparseSet, while retaining SparseSet's desirable properties. Essentially, SparseMultiSet provides multiset behavior by storing its dense data in doubly linked lists that are inlined into the dense vector. This allows it to provide good data locality as well as vector-like constant-time clear() and fast constant time find(), insert(), and erase(). It also allows SparseMultiSet to have a builtin recycler rather than keeping SparseSet's behavior of always swapping upon removal, which allows it to preserve more iterators. It's often a better alternative to a SparseSet of a growable container or vector-of-vector. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@173064 91177308-0d34-0410-b5e6-96231b3b80d8
* Move all of the header files which are involved in modelling the LLVM IRChandler Carruth2013-01-02
| | | | | | | | | | | | | | | | | | | | | into their new header subdirectory: include/llvm/IR. This matches the directory structure of lib, and begins to correct a long standing point of file layout clutter in LLVM. There are still more header files to move here, but I wanted to handle them in separate commits to make tracking what files make sense at each layer easier. The only really questionable files here are the target intrinsic tablegen files. But that's a battle I'd rather not fight today. I've updated both CMake and Makefile build systems (I think, and my tests think, but I may have missed something). I've also re-sorted the includes throughout the project. I'll be committing updates to Clang, DragonEgg, and Polly momentarily. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171366 91177308-0d34-0410-b5e6-96231b3b80d8
* MISched: add dependence to ExitSU to model live-out latency.Andrew Trick2012-12-18
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170454 91177308-0d34-0410-b5e6-96231b3b80d8
* Use GetUnderlyingObjects in mischedHal Finkel2012-12-10
| | | | | | | | | | | | | | | | misched used GetUnderlyingObject in order to break false load/store dependencies, and the -enable-aa-sched-mi feature similarly relied on GetUnderlyingObject in order to ensure it is safe to use the aliasing analysis. Unfortunately, GetUnderlyingObject does not recurse through phi nodes, and so (especially due to LSR) all of these mechanisms failed for induction-variable-dependent loads and stores inside loops. This change replaces uses of GetUnderlyingObject with GetUnderlyingObjects (which will recurse through phi and select instructions) in misched. Andy reviewed, tested and simplified this patch; Thanks! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169744 91177308-0d34-0410-b5e6-96231b3b80d8
* Use the new script to sort the includes of every file under lib.Chandler Carruth2012-12-03
| | | | | | | | | | | | | | | | | Sooooo many of these had incorrect or strange main module includes. I have manually inspected all of these, and fixed the main module include to be the nearest plausible thing I could find. If you own or care about any of these source files, I encourage you to take some time and check that these edits were sensible. I can't have broken anything (I strictly added headers, and reordered them, never removed), but they may not be the headers you'd really like to identify as containing the API being implemented. Many forward declarations and missing includes were added to a header files to allow them to parse cleanly when included first. The main module rule does in fact have its merits. =] git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169131 91177308-0d34-0410-b5e6-96231b3b80d8
* misched: Fix RegisterPressureTracker handling of DebugVals.Andrew Trick2012-12-01
| | | | | | | Assertion failed: (TopRPTracker.getPos() == RegionBegin && "bad initial Top tracker"). rdar://12790302. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169072 91177308-0d34-0410-b5e6-96231b3b80d8
* misched: Fix the DAG builder to handle an undef operand at ExitSU.Andrew Trick2012-12-01
| | | | | | | Assertion failed: (VNI && "No value to read by operand") rdar://12790267. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169071 91177308-0d34-0410-b5e6-96231b3b80d8
* misched: Analysis that partitions the DAG into subtrees.Andrew Trick2012-11-28
| | | | | | | | | | | This is a simple, cheap infrastructure for analyzing the shape of a DAG. It recognizes uniform DAGs that take the shape of bottom-up subtrees, such as the included matrix multiplication example. This is useful for heuristics that balance register pressure with ILP. Two canonical expressions of the heuristic are implemented in scheduling modes: -misched-ilpmin and -misched-ilpmax. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168773 91177308-0d34-0410-b5e6-96231b3b80d8
* misched: rename ScheduleDAGILP to ScheduleDFS to prepare for other heuristics.Andrew Trick2012-11-28
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168772 91177308-0d34-0410-b5e6-96231b3b80d8
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