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path: root/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
Commit message (Expand)AuthorAge
* Don't narrow the load and store in a load+twiddle+store sequence unlessDan Gohman2010-09-02
* Fix a crash in the dag combiner caused by ConstantFoldBIT_CONVERTofBUILD_VECT...Nate Begeman2010-07-27
* Remove r108639 now that it is handled by InstCombine instead.Owen Anderson2010-07-19
* Add a DAGCombine xform to fold away redundant float->double->float conversion...Owen Anderson2010-07-18
* Convert some tab stops into spaces.Duncan Sands2010-07-12
* Reenable DAG combining for vector shuffles. It looks like it was temporarilyBob Wilson2010-07-09
* Merge the duplicated iabs optimization in DAGCombiner and let it detected a f...Benjamin Kramer2010-07-08
* Move getExtLoad() and (some) getLoad() DebugLoc argument after EVT argument f...Evan Cheng2010-07-07
* Propagate debug loc.Devang Patel2010-07-06
* Unlike other targets, ARM now uses BUILD_VECTORs post-legalization so theyBob Wilson2010-06-28
* Remove variables which are assigned to but for which the valueDuncan Sands2010-06-25
* Reapply r106634, now that the bug it exposed is fixed.Dan Gohman2010-06-24
* Revert r106263, "Fold the ShrinkDemandedOps pass into the regular DAGCombiner...Daniel Dunbar2010-06-23
* Some targets don't require the fencing MEMBARRIER instructions surroundingJim Grosbach2010-06-23
* Fold the ShrinkDemandedOps pass into the regular DAGCombiner pass,Dan Gohman2010-06-18
* Fix another variant of PR 7191. Also add a testcaseDale Johannesen2010-05-25
* Fix PR 7191. I have been unable to create a .ll file that fails, sorry.Dale Johannesen2010-05-25
* Clean up extra whitespace.Bob Wilson2010-05-21
* Change CodeGen/ARM/2009-11-02-NegativeLane.ll to use 16-bit vector elementsBob Wilson2010-05-21
* Optimize away insertelement of an undef value. This shows up inBob Wilson2010-05-19
* Intrinsics which do a vector compare (results are all zero or all ones) are m...Evan Cheng2010-05-19
* Sink dag combine's post index load / store code that swap base ptr and index ...Evan Cheng2010-05-18
* FIX PR7158. SimplifyVBinOp was asserting when it fails to constant fold (op (...Evan Cheng2010-05-18
* Be careful with operand promotion. For a binary operation, the source operand...Evan Cheng2010-05-10
* Apply a patch from Jan Sjodin to fix a compiler abort on vectorDan Gohman2010-04-30
* Try operation promotion only if regular dag combine and target-specific ones ...Evan Cheng2010-04-28
* - When legal, promote a load to zextload rather than ext load.Evan Cheng2010-04-27
* When a load operand is promoted to an extload, replace other uses with uses o...Evan Cheng2010-04-24
* Apply a fix for a vector setcc dagcombine from Jan Sjodin. NoDan Gohman2010-04-24
* Code refactoring.Evan Cheng2010-04-23
* - It's not safe to promote rotates (at least not trivially).Evan Cheng2010-04-22
* The visitXOR method can return the same SDNode. If so, we don't want to deleteBill Wendling2010-04-20
* More progress on promoting i16 operations to i32 for x86. Work in progress.Evan Cheng2010-04-19
* More work to allow dag combiner to promote 16-bit ops to 32-bit.Evan Cheng2010-04-17
* (i32 sext_in_reg (i32 aext (i16 x)), i16) -> (i32 sext x). No known test case...Evan Cheng2010-04-16
* Adding support for dag combiner to promote operations for profit. This requir...Evan Cheng2010-04-16
* enhance the load/store narrowing optimization to handle aChris Lattner2010-04-15
* teach codegen to turn trunc(zextload) into load when possible.Chris Lattner2010-04-15
* add a simple dag combine to replace trivial shl+lshr withChris Lattner2010-04-15
* Implement rdar://7860110 (also in target/readme.txt) narrowingChris Lattner2010-04-15
* Add const qualifiers to CodeGen's use of LLVM IR constructs.Dan Gohman2010-04-15
* Remove unnecessary parens.Dan Gohman2010-04-12
* Fix -Wsign-compare warning (issued by clang++).Ted Kremenek2010-04-08
* fix 80 col violation, patch by Alastair LynnChris Lattner2010-04-07
* Fix sdisel memcpy, memset, memmove lowering:Evan Cheng2010-04-01
* fix PR6533 by updating the br(xor) code to remember the caseChris Lattner2010-03-10
* Fix another bitwidth calculation to handle vector types; based on aDan Gohman2010-03-10
* Fix more code to work properly with vector operands. Based onDan Gohman2010-03-04
* Use APInt instead of zext value.Bill Wendling2010-03-03
* This test case:Bill Wendling2010-03-03