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path: root/lib/Target/AArch64/AArch64ISelLowering.cpp
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* Merging r198937:Tom Stellard2014-04-11
* Merging r201541:Tom Stellard2014-04-09
* Merge rest of r196210. Some bits strayed into r196701, turning 3.4 red. ThisTim Northover2013-12-09
* Merging r196456:Bill Wendling2013-12-08
* Merging r196190:Bill Wendling2013-12-08
* Merging r195932:Bill Wendling2013-12-01
* Merging r195905:Bill Wendling2013-12-01
* Merging r195843:Bill Wendling2013-12-01
* Merging r195716:Bill Wendling2013-11-26
* Implement AArch64 neon instructions class SIMD lsone and SIMD lone-post.Hao Liu2013-11-19
* Implement the newly added ACLE functions for ld1/st1 with 2/3/4 vectors.Hao Liu2013-11-18
* Implement aarch64 neon instruction class SIMD misc.Kevin Qin2013-11-14
* Implement AArch64 Neon instruction set Bitwise Extract.Jiangning Liu2013-11-06
* Implement AArch64 post-index vector load/store multiple N-element structure c...Hao Liu2013-11-05
* Implemented aarch64 neon intrinsic vcopy_lane with float type.Kevin Qin2013-11-05
* [AArch64] Make the use of FP instructions optional, but enabled by default.Amara Emerson2013-10-31
* [AArch64] Add support for NEON scalar floating-point compare instructions.Chad Rosier2013-10-30
* [AArch64] Implement FrameAddr and ReturnAddrWeiming Zhao2013-10-29
* [AArch64] Fix NZCV reg live-in bug in F128CSEL codegen.Amara Emerson2013-10-24
* Implement aarch64 neon instruction set AdvSIMD (copy).Kevin Qin2013-10-11
* Implement AArch64 vector load/store multiple N-element structure class SIMD(l...Hao Liu2013-10-10
* Revert "Implement AArch64 vector load/store multiple N-element structure clas...Rafael Espindola2013-10-10
* Implement AArch64 vector load/store multiple N-element structure class SIMD(l...Hao Liu2013-10-10
* [AArch64] Add support for NEON scalar arithmetic instructions:Chad Rosier2013-10-07
* Implement aarch64 neon instruction set AdvSIMD (3V elem).Jiangning Liu2013-10-04
* Initial support for Neon scalar instructions.Jiangning Liu2013-09-24
* AArch64: use RegisterOperand for NEON registers.Tim Northover2013-09-13
* Inplement aarch64 neon instructions in AdvSIMD(shift). About 24 shift instruc...Hao Liu2013-09-04
* Clang and AArch64 backend patches to support shll/shl and vmovl instructions ...Hao Liu2013-08-15
* Update makeLibCall to return both the call and the chain associated with the ...Michael Gottesman2013-08-13
* AArch64: add initial NEON supportTim Northover2013-08-01
* AArch64: fix even more JIT failuresTim Northover2013-07-25
* Make some arrays 'static const'Craig Topper2013-07-15
* Use SmallVectorImpl& instead of SmallVector to avoid repeating small vector s...Craig Topper2013-07-14
* AArch64/PowerPC/SystemZ/X86: This patch fixes the interface, usage, and allStephen Lin2013-07-09
* Remove the EXCEPTIONADDR, EHSELECTION, and LSDAADDR ISD opcodes.Jakob Stoklund Olesen2013-07-04
* Revert r185595-185596 which broke buildbots.Jakob Stoklund Olesen2013-07-04
* Remove the EXCEPTIONADDR, EHSELECTION, and LSDAADDR ISD opcodes.Jakob Stoklund Olesen2013-07-03
* The getRegForInlineAsmConstraint function should only accept MVT value types.Chad Rosier2013-06-22
* Don't cache the instruction info and register info objects.Bill Wendling2013-06-07
* Order CALLSEQ_START and CALLSEQ_END nodes.Andrew Trick2013-05-29
* Track IR ordering of SelectionDAG nodes 2/4.Andrew Trick2013-05-25
* Replace Count{Leading,Trailing}Zeros_{32,64} with count{Leading,Trailing}Zeros.Michael J. Spencer2013-05-24
* Add LLVMContext argument to getSetCCResultTypeMatt Arsenault2013-05-18
* AArch64: assert code model is small for TLS accessesTim Northover2013-05-04
* AArch64: support large code model for jump-tablesTim Northover2013-05-04
* AArch64: implement support for blockaddress in large code modelTim Northover2013-05-04
* AArch64: implement large code model access to global variables.Tim Northover2013-05-04
* Remove unused ShouldFoldAtomicFences flag.Tim Northover2013-04-20
* AArch64: remove barriers from AArch64 atomic operations.Tim Northover2013-04-08