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path: root/lib/Target/AArch64/AArch64ISelLowering.cpp
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* [C++11] Replace llvm::next and llvm::prior with std::next and std::prev.Benjamin Kramer2014-03-02
* AArch64: __va_list.__stack must be 8-byte alignedOliver Stannard2014-02-20
* [AArch64] Expanded sin, cos, pow with FP vector types inputsAna Pazos2014-02-18
* Fix a typo about lowering AArch64 va_copy.Jiangning Liu2014-02-18
* [AArch64 NEON] Fix a bug to avoid using floating type as condition type in lo...Kevin Qin2014-02-14
* [AArch64]Fix the assertion failure caused by "v1i1 SETCC" DAG node.Hao Liu2014-02-14
* [AArch64] Custom lower concat_vector patterns with v4i16, v4i32, v8i8, v8i16,...Chad Rosier2014-01-30
* [AArch64 NEON] Lower SELECT_CC with vector operand.Kevin Qin2014-01-29
* [AArch64 NEON] Try to generate CONCAT_VECTOR when lowering BUILD_VECTOR or SH...Kevin Qin2014-01-27
* Revert r199791.Kevin Qin2014-01-27
* fix some spell mistakes around 'ConcatVector' and 'ShuffleVector' in AArch64 ...Kevin Qin2014-01-23
* [AArch64 NEON] Try to generate CONCAT_VECTOR when lowering BUILD_VECTOR or SH...Kevin Qin2014-01-22
* [AArch64 NEON] Fix a bug caused by undef lane when generating VEXT.Kevin Qin2014-01-21
* Revert r199628: "[AArch64 NEON] Fix a bug caused by undef lane when generatin...Chandler Carruth2014-01-20
* [AArch64 NEON] Fix a bug caused by undef lane when generating VEXT.Kevin Qin2014-01-20
* [AArch64 NEON] Expand vector for UDIV/SDIV/UREM/SREM/FREM as neon doesn't sup...Kevin Qin2014-01-17
* [AArch64 NEON] Custom lower conversion between vector integer and vector floa...Kevin Qin2014-01-17
* [AArch64]Fix the problem can't select concat_vectors of two v1i32 types.Hao Liu2014-01-17
* For AArch64, lowering sext_inreg and generate optimized code by using SXTL.Jiangning Liu2014-01-15
* AArch64: don't try to handle [SU]MUL_LOHI nodesTim Northover2014-01-14
* Add FPExt option to CCValAssign::LocInfo. When generating calling-conventionLang Hames2014-01-14
* [AArch64] Fix assertion failure caused by an invalid comparison between APInt...Andrea Di Biagio2014-01-13
* [AArch64 NEON] Add more scenarios to use perm instructions when lowering shuf...Kevin Qin2014-01-13
* Silence unused variable warning for non-asserting builds that was introduced ...Kristof Beyls2014-01-10
* Make sure -use-init-array has intended effect on all AArch64 ELF targets, not...Kristof Beyls2014-01-10
* [AArch64 NEON] Fix generating incorrect value type of NEON_VDUPLANEKevin Qin2014-01-08
* Remove unnecessary #includes.Bill Wendling2014-01-06
* Refactor function that checks that __builtin_returnaddress's argument is cons...Bill Wendling2014-01-06
* Emit an error message if the value passed to __builtin_returnaddress isn't a ...Bill Wendling2014-01-05
* Remove the 's' DataLayout specificationRafael Espindola2014-01-01
* [AArch64]Fix the problem that can't select mul of v1i64/v2i64 types.Hao Liu2013-12-30
* [AArch64 NEON] Fix a bug when lowering BUILD_VECTOR.Kevin Qin2013-12-24
* [AArch64 NEON] Fix a pattern match failure with NEON_VDUP.Kevin Qin2013-12-24
* [AArch64 NEON]Implment loading vector constant form constant pool.Kevin Qin2013-12-18
* [AArch64]Fix the pattern match failure for v1i8/v1i16/v1i32 types.Hao Liu2013-12-16
* [AArch64] Removed unnecessary copy patterns with v1fx types.Chad Rosier2013-12-12
* [AArch64 NEON] Get instruction BSL matched to VSELECT.Kevin Qin2013-12-11
* [AArch64]Pattern match failures for truncate store and extend loadHao Liu2013-12-09
* For AArch64, add missing register cost calculation for big value types like v...Jiangning Liu2013-12-05
* [AArch64]Add missing floating point convert, round and misc intrinsics.Hao Liu2013-12-03
* Add some missing pattern matches for AArch64 Neon intrinsics like vmull_high_...Jiangning Liu2013-12-03
* Silence sign-compare warning and reduce nesting.Benjamin Kramer2013-11-28
* Remove the variable only used by assert to avoid the build failureJiangning Liu2013-11-28
* Fix the AArch64 NEON bug exposed by checking constant integer argument range ...Jiangning Liu2013-11-27
* Refactored the implementation of AArch64 NEON instruction ZIP, UZPKevin Qin2013-11-26
* Implement AArch64 neon instructions class SIMD lsone and SIMD lone-post.Hao Liu2013-11-19
* Implement the newly added ACLE functions for ld1/st1 with 2/3/4 vectors.Hao Liu2013-11-18
* Implement aarch64 neon instruction class SIMD misc.Kevin Qin2013-11-14
* Implement AArch64 Neon instruction set Bitwise Extract.Jiangning Liu2013-11-06
* Implement AArch64 post-index vector load/store multiple N-element structure c...Hao Liu2013-11-05