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path: root/lib/Target/ARM/ARMBaseInstrInfo.cpp
Commit message (Expand)AuthorAge
* Merging r199369:Tom Stellard2014-04-09
* Merging r196588:Bill Wendling2013-12-08
* Merging r196046:Bill Wendling2013-12-02
* Merging r195401:Bill Wendling2013-12-02
* [weak vtables] Remove a bunch of weak vtablesJuergen Ributzka2013-11-19
* Revert r194865 and r194874.Alexey Samsonov2013-11-18
* [weak vtables] Remove a bunch of weak vtablesJuergen Ributzka2013-11-15
* Enable generating legacy IT block for AArch32Weiming Zhao2013-11-13
* ARM: fold prologue/epilogue sp updates into push/pop for code sizeTim Northover2013-11-08
* ARM: remove unnecessary state-tracking during frame lowering.Tim Northover2013-11-04
* ARM: Thumb2 copy for GPRPair needs to use thumb instructions.Jim Grosbach2013-10-22
* ARM: Clean up copyPhysReg() a bit.Jim Grosbach2013-10-22
* ARM: optimizeSelect has to consider the previous register classMatthias Braun2013-10-04
* [ARM] Warn on deprecated IT blocks in v8 AArch32 assembly.Amara Emerson2013-10-03
* IfConverter: Use TargetSchedule for instruction latenciesArnold Schwaighofer2013-09-30
* Fix spelling.Robert Wilhelm2013-09-14
* [ARMv8] Prevent generation of deprecated IT blocks on ARMv8 in Thumb mode.Joey Gouly2013-09-09
* Let t2LDRBi8 and t2LDRBi12 have same Base PointerRenato Golin2013-08-14
* Refactor AnalyzeBranch on ARM. The previous version did not always analyzeLang Hames2013-07-19
* Related to r181161 - Indirect branches may not be the last branch in a basicLang Hames2013-07-16
* Fix ARM paired GPR COPY loweringJF Bastien2013-07-12
* DebugInfo: remove target-specific Frame Index handling for DBG_VALUE MachineI...David Blaikie2013-06-16
* Machine Model: Add MicroOpBufferSize and resource BufferSize.Andrew Trick2013-06-15
* Don't cache the instruction and register info from the TargetMachine, becauseBill Wendling2013-06-07
* ARMInstrInfo: Improve isSwiftFastImmShiftArnold Schwaighofer2013-06-05
* Revert series of sched model patches until I figure out what is going on.Arnold Schwaighofer2013-06-04
* ARMInstrInfo: Improve isSwiftFastImmShiftArnold Schwaighofer2013-06-04
* ARM AnalyzeBranch should conservatively return true when it sees a predicatedEvan Cheng2013-05-05
* ARM: Use ldrd/strd to spill 64-bit pairs when available.Tim Northover2013-04-21
* ARM: don't add FrameIndex offset for LDMIA (has no immediate)Tim Northover2013-04-20
* ARM scheduler model: Swift has varying latencies, uops for simple ALU opsArnold Schwaighofer2013-04-05
* Enabling the generation of dependency breakers for partial updates on Cortex-...Silviu Baranga2013-03-27
* Adding an A15 specific optimization pass for interactions between S/D/Q regis...Silviu Baranga2013-03-15
* Radar numbers don't belong in source code.Evan Cheng2013-02-21
* Move all of the header files which are involved in modelling the LLVM IRChandler Carruth2013-01-02
* Remove the Function::getFnAttributes method in favor of using the AttributeSetBill Wendling2012-12-30
* MachineInstrBuilderize ARM.Jakob Stoklund Olesen2012-12-20
* Remove the explicit MachineInstrBuilder(MI) constructor.Jakob Stoklund Olesen2012-12-19
* Rename the 'Attributes' class to 'Attribute'. It's going to represent a singl...Bill Wendling2012-12-19
* Use the new script to sort the includes of every file under lib.Chandler Carruth2012-12-03
* Remove all references to TargetInstrInfoImpl.Jakob Stoklund Olesen2012-11-28
* misched: Target-independent support for load/store clustering.Andrew Trick2012-11-12
* Add GPRPair Register class to ARM.Jakob Stoklund Olesen2012-10-26
* misched: Use the TargetSchedModel interface wherever possible.Andrew Trick2012-10-10
* whitespaceAndrew Trick2012-10-10
* Create enums for the different attributes.Bill Wendling2012-10-09
* Add LLVM support for Swift.Bob Wilson2012-09-29
* Remove the `hasFnAttr' method from Function.Bill Wendling2012-09-26
* More domain conversion; convert VFP VMOVS to NEON instructions in more cases ...James Molloy2012-09-18
* Implement getNumLDMAddresses and expose through ARMBaseInstrInfo.Andrew Trick2012-09-14