| Commit message (Expand) | Author | Age |
|---|
| * | Add codegen support for vector select (in the IR this means a select | Duncan Sands | 2011-09-06 |
| * | 64-bit atomic cmpxchg for ARM. | Eli Friedman | 2011-08-31 |
| * | Some 64-bit atomic operations on ARM. 64-bit cmpxchg coming next. | Eli Friedman | 2011-08-31 |
| * | Follow up to r138791. | Evan Cheng | 2011-08-30 |
| * | Change ARM / Thumb2 addc / adde and subc / sube modeling to use physical | Evan Cheng | 2011-08-30 |
| * | land David Blaikie's patch to de-constify Type, with a few tweaks. | Chris Lattner | 2011-07-18 |
| * | Improve codegen for select's: | Evan Cheng | 2011-07-13 |
| * | Remove getRegClassForInlineAsmConstraint from the ARM port. | Eric Christopher | 2011-06-29 |
| * | Have LowerOperandForConstraint handle multiple character constraints. | Eric Christopher | 2011-06-02 |
| * | Make the logic for determining function alignment more explicit. No function... | Eli Friedman | 2011-05-06 |
| * | Add an unfolded offset field to LSR's Formula record. This is used to | Dan Gohman | 2011-05-03 |
| * | ARM and Thumb2 support for atomic MIN/MAX/UMIN/UMAX loads. | Jim Grosbach | 2011-04-26 |
| * | Thumb2 and ARM add/subtract with carry fixes. | Andrew Trick | 2011-04-23 |
| * | whitespace | Andrew Trick | 2011-04-23 |
| * | ARM byval support. Will be enabled by another patch to the FE. <rdar://prob... | Stuart Hastings | 2011-04-20 |
| * | Add a ARM-specific SD node for VBSL so that forms with a constant first operand | Cameron Zwarich | 2011-03-30 |
| * | Re-apply r127953 with fixes: eliminate empty return block if it has no predec... | Evan Cheng | 2011-03-21 |
| * | Revert r127953, "SimplifyCFG has stopped duplicating returns into predecessors | Daniel Dunbar | 2011-03-19 |
| * | SimplifyCFG has stopped duplicating returns into predecessors to canonicalize IR | Evan Cheng | 2011-03-19 |
| * | Some minor cleanups based on feedback. | Bill Wendling | 2011-03-15 |
| * | Generate a VTBL instruction instead of a series of loads and stores when we | Bill Wendling | 2011-03-14 |
| * | Fix a compiler crash where a Glue value had multiple uses. Radar 9049552. | Bob Wilson | 2011-03-08 |
| * | Move getRegPressureLimit() from TargetLoweringInfo to TargetRegisterInfo. | Cameron Zwarich | 2011-03-07 |
| * | Remove unused conditional negate operations. | Bob Wilson | 2011-03-05 |
| * | Support for byval parameters on ARM. Will be enabled by a forthcoming | Stuart Hastings | 2011-02-28 |
| * | Add codegen support for using post-increment NEON load/store instructions. | Bob Wilson | 2011-02-07 |
| * | Given a pair of floating point load and store, if there are no other uses of | Evan Cheng | 2011-02-02 |
| * | Last round of fixes for movw + movt global address codegen. | Evan Cheng | 2011-01-21 |
| * | Materialize GA addresses with movw + movt pairs for Darwin in PIC mode. e.g. | Evan Cheng | 2011-01-17 |
| * | Recognize inline asm 'rev /bin/bash, ' as a bswap intrinsic call. | Evan Cheng | 2011-01-08 |
| * | Lower some BUILD_VECTORS using VEXT+shuffle. | Bob Wilson | 2011-01-07 |
| * | Enable sibling call optimization of libcalls which are expanded during | Evan Cheng | 2010-11-30 |
| * | Add support for NEON VLD2-dup instructions. | Bob Wilson | 2010-11-28 |
| * | Add support for ARM's specialized vector-compare-against-zero instructions. | Owen Anderson | 2010-11-08 |
| * | Disallow the certain NEON modified-immediate forms when generating vorr or vbic. | Owen Anderson | 2010-11-05 |
| * | Add codegen and encoding support for the immediate form of vbic. | Owen Anderson | 2010-11-05 |
| * | Add support for code generation of the one register with immediate form of vorr. | Owen Anderson | 2010-11-03 |
| * | Fix preload instruction isel. Only v7 supports pli, and only v7 with mp exten... | Evan Cheng | 2010-11-03 |
| * | Overhaul memory barriers in the ARM backend. Radar 8601999. | Bob Wilson | 2010-10-30 |
| * | Inline asm multiple alternative constraints development phase 2 - improved ba... | John Thompson | 2010-10-29 |
| * | Add a pre-dispatch SjLj EH hook on the unwind edge for targets to do any | Jim Grosbach | 2010-10-19 |
| * | Remove unused ARMISD::AND selection DAG node. | Bob Wilson | 2010-10-15 |
| * | Define the TargetLowering::getTgtMemIntrinsic hook for ARM so that NEON load | Bob Wilson | 2010-09-21 |
| * | Teach if-converter to be more careful with predicating instructions that would | Evan Cheng | 2010-09-10 |
| * | Remove NEON vmull, vmlal, and vmlsl intrinsics, replacing them with multiply, | Bob Wilson | 2010-09-01 |
| * | Create an ARMISD::AND node. This node is exactly like the "ARM::AND" node, but | Bill Wendling | 2010-08-29 |
| * | Consider this code snippet: | Bill Wendling | 2010-08-11 |
| * | Add support for getting & setting the FPSCR application register on ARM when ... | Nate Begeman | 2010-08-03 |
| * | Remove dead prototype | Jim Grosbach | 2010-07-28 |
| * | Hook in GlobalMerge pass | Anton Korobeynikov | 2010-07-24 |
