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path: root/lib/Target/ARM/ARMInstrThumb.td
Commit message (Expand)AuthorAge
* set isCompare for another three Thumb1 instructionsGabor Greif2010-09-14
* set comparable for a bunch of Thumb instructionsGabor Greif2010-09-14
* For each instruction itinerary class, specify the number of micro-ops eachEvan Cheng2010-09-09
* grammar tweakJim Grosbach2010-09-07
* Make ARM add rN, sp, #imm instructions rematerializable. That's how the addre...Jim Grosbach2010-08-30
* Delete some unused instructions.Evan Cheng2010-08-10
* Move newlines before inline jumptables from the asm strings in .td files toBob Wilson2010-07-31
* LEApcrelJT shouldn't be marked as neverHasSideEffects, as we don't want itJim Grosbach2010-06-21
* Clean up 80 column violations. No functional change.Jim Grosbach2010-06-02
* Cosmetic cleanup. No functional change.Jim Grosbach2010-05-28
* make sure accesses to set up the jmpbuf don't get moved after it by the sched...Jim Grosbach2010-05-28
* Update the saved stack pointer in the sjlj function context following eitherJim Grosbach2010-05-27
* fix off by 1 (insn) error in eh.sjlj.setjmp thumb code sequence.Jim Grosbach2010-05-26
* Implement eh.sjlj.longjmp for ARM. Clean up the intrinsic a bit.Jim Grosbach2010-05-22
* t2LEApcrel and tLEApcrel are re-materializable. This makes it possible to hoi...Evan Cheng2010-05-19
* Mark pattern-less mayLoad / mayStore instructions neverHasSideEffects. These ...Evan Cheng2010-05-19
* Mark a few more pattern-less instructions with neverHasSideEffects. This is e...Evan Cheng2010-05-19
* Fix a regression in 464.h264 for thumb1 and thumb2 nightly tests.Bob Wilson2010-05-17
* Chris said that the comment char should be escaped. Fix all the occurences of...Anton Korobeynikov2010-05-16
* "trap" pseudo-op turned out to be apple-local.Anton Korobeynikov2010-05-15
* Select @llvm.trap to the special B with 1111 condition (i.e. trap) instruction.Evan Cheng2010-05-11
* set SDNPVariadic on nodes throughout the rest of the targets thatChris Lattner2010-03-19
* Remove the writeback flag from ARM's address mode 4. Now that we have separateBob Wilson2010-03-16
* Change ARM ld/st multiple instructions to have variant instructions forBob Wilson2010-03-13
* Factored out the disassembly printing of CPS option, MSR mask, and Negative ZeroJohnny Chen2010-03-10
* Modified the asm string of 16-bit Thumb MUL instruction so that it prints:Johnny Chen2010-03-03
* Added 32-bit Thumb instructions: CPS, SDIV, UDIV, SXTB16, SXTAB16, UXTAB16, SEL,Johnny Chen2010-03-02
* The mayHaveSideEffects flag is no longer used.Dan Gohman2010-02-27
* Added the following 16-bit Thumb instructions for disassembly only: YIELD, WFE,Johnny Chen2010-02-25
* Added tNOP for disassembly only.Johnny Chen2010-02-25
* Added tSVC and tTRAP for disassembly only.Johnny Chen2010-02-25
* Updated version of r96634 (which was reverted due to failing 176.gcc andJim Grosbach2010-02-22
* 80 column cleanupJim Grosbach2010-02-16
* Remove trailing whitespaceJim Grosbach2010-02-16
* Added BKPT/tBKPT (breakpoint) to the instruction table for disassembly purpose.Johnny Chen2010-02-11
* Radar 7417921Jim Grosbach2010-02-09
* tighten up eh.setjmp sequence a bit.Jim Grosbach2010-02-08
* Adjust setjmp instruction sequence to not need 32-bit alignment paddingJim Grosbach2010-01-27
* Fix PR5694. The CMN instructions set the flags differently from CMP, so theyJim Grosbach2010-01-22
* The most significant encoding bit of GPR:$src or GPR:$dst was over-specified inJohnny Chen2010-01-18
* Added 16-bit Thumb Load/Store immediate instructions with encoding bits so thatJohnny Chen2010-01-14
* Fixed a couple of places for Thumb MOV where encoding bits are underspecified.Johnny Chen2010-01-13
* Remove the JustSP single-register regclass.Jakob Stoklund Olesen2010-01-13
* Add a SPR register class to the ARM target.Jakob Stoklund Olesen2009-12-22
* Renamed "tCMNZ" to "tCMNz" to be consistent with other similar namings.Johnny Chen2009-12-16
* Add encoding bits for some Thumb instructions. Plus explicitly set the top twoJohnny Chen2009-12-16
* Added encoding bits for the Thumb ISA. Initial checkin.Johnny Chen2009-12-15
* Thumb1 exception handling setjmpJim Grosbach2009-12-01
* Remat VLDRD from constpool. Clean up some instruction property specifications.Evan Cheng2009-11-20
* More consistent thumb1 asm printing.Evan Cheng2009-11-19