| Commit message (Expand) | Author | Age |
|---|
| * | New machine model for cortex-a9. Schedule for resources and latency. | Andrew Trick | 2013-12-28 |
| * | The Cortex-A9 machine model is incomplete. Mark it as such. | Andrew Trick | 2013-12-28 |
| * | MI-Sched: handle latency of in-order operations with the new machine model. | Andrew Trick | 2013-12-05 |
| * | Fix the A9 machine model. VTRN writes two registers. | Andrew Trick | 2013-12-05 |
| * | Correct word hyphenations | Alp Toker | 2013-12-05 |
| * | Fix scheduling for vldm/vstm instructions that load/store more than 32 bytes ... | Silviu Baranga | 2013-09-04 |
| * | Update machine models. Specify buffer sizes for OOO processors. | Andrew Trick | 2013-06-15 |
| * | Machine Model: Add MicroOpBufferSize and resource BufferSize. | Andrew Trick | 2013-06-15 |
| * | ARM sched model: Add integer VFP/SIMD instructions on Swift | Arnold Schwaighofer | 2013-06-06 |
| * | ARM sched model: Cortex A9 - More InstRW sched resources | Arnold Schwaighofer | 2013-06-06 |
| * | ARM sched model: Add divsion, loads, branches, vfp cvt | Arnold Schwaighofer | 2013-06-05 |
| * | Revert series of sched model patches until I figure out what is going on. | Arnold Schwaighofer | 2013-06-04 |
| * | ARM sched model: Cortex A9 - More InstRW sched resources | Arnold Schwaighofer | 2013-06-04 |
| * | ARM sched model: Add divsion, loads, branches, vfp cvt | Arnold Schwaighofer | 2013-06-04 |
| * | ARM scheduler model: Add scheduler info to more instructions and resource | Arnold Schwaighofer | 2013-04-05 |
| * | ARM Scheduler Model: Add resources instructions, map resources in subtargets | Arnold Schwaighofer | 2013-04-01 |
| * | Revert ARM Scheduler Model: Add resources instructions, map resources | Arnold Schwaighofer | 2013-03-26 |
| * | ARM Scheduler Model: Add resources instructions, map resources in subtargets | Arnold Schwaighofer | 2013-03-26 |
| * | MIsched: add an ILP window property to machine model. | Andrew Trick | 2013-01-09 |
| * | Cortex-A9 latency fixes (w/ -schedmodel only). | Andrew Trick | 2012-09-21 |
| * | Cortex-A9 instruction-level scheduling machine model. | Andrew Trick | 2012-09-14 |
| * | Added MispredictPenalty to SchedMachineModel. | Andrew Trick | 2012-08-08 |
| * | I'm introducing a new machine model to simultaneously allow simple | Andrew Trick | 2012-07-07 |
| * | Reapply "Make NumMicroOps a variable in the subtarget's instruction itinerary." | Andrew Trick | 2012-07-02 |
| * | Revert "Make NumMicroOps a variable in the subtarget's instruction itinerary." | Andrew Trick | 2012-06-29 |
| * | Make NumMicroOps a variable in the subtarget's instruction itinerary. | Andrew Trick | 2012-06-29 |
| * | ARM itinerary properties. | Andrew Trick | 2012-06-05 |
| * | Fix a number of problems with ARM fused multiply add/subtract instructions. | Evan Cheng | 2012-04-11 |
| * | Improvements for the Cortex-A9 scheduling itineraries. | Bob Wilson | 2011-04-19 |
| * | Change A9 scheduling itineraries VLD* / VST* entries default to "aligned". That | Evan Cheng | 2011-04-19 |
| * | Sorry, several patches in one. | Evan Cheng | 2011-01-20 |
| * | Fix the ARM IIC_iCMPsi itinerary and add an important assert. | Andrew Trick | 2011-01-04 |
| * | Fix an obvious cut-n-paste error. | Evan Cheng | 2010-12-08 |
| * | Add support for NEON VLD3-dup instructions. | Bob Wilson | 2010-11-30 |
| * | Add support for NEON VLD3-dup instructions. | Bob Wilson | 2010-11-29 |
| * | Fix copy-and-paste errors in VLD2-dup scheduling itineraries. | Bob Wilson | 2010-11-29 |
| * | Add support for NEON VLD2-dup instructions. | Bob Wilson | 2010-11-28 |
| * | Add NEON VLD1-dup instructions (load 1 element to all lanes). | Bob Wilson | 2010-11-27 |
| * | Fix incorrect scheduling itineraries for NEON vld1/vst1 instructions. | Bob Wilson | 2010-11-27 |
| * | Conditional moves are slightly more expensive than moves. | Evan Cheng | 2010-11-13 |
| * | Fix preload instruction isel. Only v7 supports pli, and only v7 with mp exten... | Evan Cheng | 2010-11-03 |
| * | Modify scheduling itineraries to correct instruction latencies (not operand | Evan Cheng | 2010-11-03 |
| * | Add NEON VST1-lane instructions. Partial fix for Radar 8599955. | Bob Wilson | 2010-11-02 |
| * | Add NEON VLD1-lane instructions. Partial fix for Radar 8599955. | Bob Wilson | 2010-11-01 |
| * | Fix fpscr <-> GPR latency info. | Evan Cheng | 2010-10-29 |
| * | Re-commit 117518 and 117519 now that ARM MC test failures are out of the way. | Evan Cheng | 2010-10-28 |
| * | Revert 117518 and 117519 for now. They changed scheduling and cause MC tests ... | Evan Cheng | 2010-10-28 |
| * | - Assign load / store with shifter op address modes the right itinerary classes. | Evan Cheng | 2010-10-28 |
| * | putback r116983 and fix simple-fp-encoding.ll tests | Andrew Trick | 2010-10-21 |
| * | Revert r116983, which is breaking all the buildbots. | Owen Anderson | 2010-10-21 |
