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path: root/lib/Target/ARM/InstPrinter
Commit message (Expand)AuthorAge
* Added a option to the disassembler to print immediates as hex.Kevin Enderby2012-12-05
* Use the new script to sort the includes of every file under lib.Chandler Carruth2012-12-03
* Remove hard coded registers in ARM ldrexd and strexd instructionsWeiming Zhao2012-11-16
* ARM: Better disassembly for pc-relative LDR.Jim Grosbach2012-10-30
* Make branch heavy code for generating marked up disassembly simplerKevin Enderby2012-10-23
* Add support for annotated disassembly output for X86 and arm.Kevin Enderby2012-10-22
* ARMInstPrinter.cpp: Fix a warning in -Asserts. [-Wunused-variable]NAKAMURA Takumi2012-09-22
* Whitespace.NAKAMURA Takumi2012-09-22
* Fix edge cases of ARM shift operands in arith instructions.Tim Northover2012-09-22
* Fix the handling of edge cases in ARM shifted operands.Tim Northover2012-09-22
* Fix #13035, a bug around Thumb instruction LDRD/STRD with negative #0 offset ...Jiangning Liu2012-08-02
* Fix #13241, a bug around shift immediate operand for ARM instruction ADR.Jiangning Liu2012-08-02
* ARM: Define generic HINT instruction.Jim Grosbach2012-06-18
* Fix the encoding of the armv7m (MClass) for MSR registers other than aspr,Kevin Enderby2012-06-15
* Fix the encoding of the armv7m (MClass) for MSR APSR writes which was missingKevin Enderby2012-05-17
* Fixed the LLVM ARM v7 assembler and instruction printer for 8-bit immediate o...Silviu Baranga2012-05-11
* Refactor IT handling not to store the bottom bit of the condition code in the...Richard Barton2012-04-27
* For ARM disassembly only print 32 unsigned bits for the address of branchKevin Enderby2012-04-13
* Move getOpcodeName from the various target InstPrinters into the superclass M...Benjamin Kramer2012-04-02
* Remove getInstructionName from MCInstPrinter implementations in favor of usin...Craig Topper2012-04-02
* Make MCInstrInfo available to the MCInstPrinter. This will be used to remove ...Craig Topper2012-04-02
* ARM more NEON VLD/VST composite physical register refactoring.Jim Grosbach2012-03-06
* ARM refactor more NEON VLD/VST instructions to use composite physregsJim Grosbach2012-03-06
* Tidy up. Kill some dead code.Jim Grosbach2012-03-06
* ARM Refactor VLD/VST spaced pair instructions.Jim Grosbach2012-03-05
* ARM refactor away a bunch of VLD/VST pseudo instructions.Jim Grosbach2012-03-05
* Make MCRegisterInfo available to the the MCInstPrinter.Jim Grosbach2012-03-05
* Change ARMInstPrinter::printPredicateOperand() so it will not abort if itKevin Enderby2012-03-01
* Remove dead code. Improve llvm_unreachable text. Simplify some control flow.Ahmed Charles2012-02-19
* Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430,...Jia Liu2012-02-18
* Convert assert(0) to llvm_unreachableCraig Topper2012-02-07
* NEON VLD4(all lanes) assembly parsing and encoding.Jim Grosbach2012-01-25
* NEON VLD3(all lanes) assembly parsing and encoding.Jim Grosbach2012-01-24
* NEON VLD4(multiple 4 element structures) assembly parsing.Jim Grosbach2012-01-24
* NEON VLD3(multiple 3-element structures) assembly parsing.Jim Grosbach2012-01-23
* ARM VFP assembly parsing and encoding for VCVT(float <--> fixed point).Jim Grosbach2011-12-22
* ARM NEON VLD2 assembly parsing for structure to all lanes, non-writeback.Jim Grosbach2011-12-21
* ARM assembly parsing and encoding support for LDRD(label).Jim Grosbach2011-12-19
* ARM NEON VST2 assembly parsing and encoding.Jim Grosbach2011-12-14
* LLVMBuild: Remove trailing newline, which irked me.Daniel Dunbar2011-12-12
* ARM parsing for VLD1 two register all lanes, no writeback.Jim Grosbach2011-11-30
* ARM parsing aliases for VLD1 single register all lanes.Jim Grosbach2011-11-30
* build/CMake: Finish removal of add_llvm_library_dependencies.Daniel Dunbar2011-11-29
* Simplify some uses of utohexstr.Benjamin Kramer2011-11-07
* build: Add initial cut at LLVMBuild.txt files.Daniel Dunbar2011-11-03
* Fix the issue that r143552 was trying to address the _right_ way. One-regist...Owen Anderson2011-11-02
* Assembly parsing for 4-register variant of VLD1.Jim Grosbach2011-10-21
* Assembly parsing for 3-register variant of VLD1.Jim Grosbach2011-10-21
* ARM VLD parsing and encoding.Jim Grosbach2011-10-21
* whitespace.Jim Grosbach2011-10-21