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path: root/lib/Target/ARM/Thumb1InstrInfo.cpp
Commit message (Expand)AuthorAge
* Move callee-saved regs spills / reloads to TFIAnton Korobeynikov2010-11-27
* convert targets to the new MF.getMachineMemOperand interface.Chris Lattner2010-09-21
* RISC architectures get their memory operand folding for free.Jakob Stoklund Olesen2010-07-11
* Replace copyRegToReg with copyPhysReg for ARM.Jakob Stoklund Olesen2010-07-11
* Thumb1 functions using @llvm.returnaddress were not saving the incoming LR.Bob Wilson2010-06-22
* Next round of tail call changes. Register used in a tailDale Johannesen2010-06-15
* Implement @llvm.returnaddress. rdar://8015977.Evan Cheng2010-05-22
* Add a DebugLoc argument to TargetInstrInfo::copyRegToReg, so that itDan Gohman2010-05-06
* Add argument TargetRegisterInfo to loadRegFromStackSlot and storeRegToStackSlot.Evan Cheng2010-05-06
* use DebugLoc default ctor instead of DebugLoc::getUnknownLoc()Chris Lattner2010-04-02
* Don't leak a MachineInstruction from Thumb1InstrInfo::restoreCalleeSavedRegis...Jeffrey Yasskin2010-03-22
* Change ARM ld/st multiple instructions to have variant instructions forBob Wilson2010-03-13
* Update Thumb1 storeRegToStackSlot() and loadRegFromStackSlot() to properlyJim Grosbach2010-01-15
* Silence a clang warning about the deprecated (but perfectly reasonable inJohn McCall2009-12-16
* Remove the target hook TargetInstrInfo::BlockHasNoFallThrough in favor ofDan Gohman2009-12-05
* Refactor code.Evan Cheng2009-11-08
* 80-column cleanup of file header commentsJim Grosbach2009-11-07
* t2ldrpci_pic can be used for blockaddress as well.Evan Cheng2009-11-07
* - Add pseudo instructions tLDRpci_pic and t2LDRpci_pic which does a pc-relativeEvan Cheng2009-11-06
* Use NEON reg-reg moves, where profitable. This reduces "domain-cross" stalls,...Anton Korobeynikov2009-11-02
* Fix a couple more places where we are creating ld / st instructions without m...Evan Cheng2009-11-01
* Add a Thumb BRIND pattern. Change the ARM BRIND assembly to separate theBob Wilson2009-10-28
* Forgot about ARM::tPUSH. It also has a new writeback operand.Evan Cheng2009-10-02
* ARM::tPOP and tPOP_RET each has an extra writeback operand now.Evan Cheng2009-10-01
* It's ok to spill a tGPR register as long as it's still allocated a low register.Evan Cheng2009-08-13
* Shrinkify Thumb2 load / store multiple instructions.Evan Cheng2009-08-11
* Move the getInlineAsmLength virtual method from TAI to TII, whereChris Lattner2009-08-02
* - More refactoring. This gets rid of all of the getOpcode calls.Evan Cheng2009-07-28
* More DCE.Evan Cheng2009-07-27
* Get rid of more dead code.Evan Cheng2009-07-27
* Get rid of some more getOpcode calls.Evan Cheng2009-07-27
* Use t2LDRi12 and t2STRi12 to load / store to / from stack frames. Eliminate m...Evan Cheng2009-07-27
* Merge isLoadFromStackSlot into one since it behaves the same regardless of su...Evan Cheng2009-07-27
* Just use a single isMoveInstr to catch all the cases.Evan Cheng2009-07-27
* Rename tMOVhi2lor to tMOVgpr2tgpr. It's not moving from a high register to a ...Evan Cheng2009-07-26
* Change Thumb2 jumptable codegen to one that uses two level jumps:Evan Cheng2009-07-25
* Remove unused member functions.Eli Friedman2009-07-24
* FLDD, FLDS, FCPYD, FCPYS, FSTD, FSTS, VMOVD, VMOVQ maps to the same instructi...Evan Cheng2009-07-24
* Correctly handle the Thumb-2 imm8 addrmode. Specialize frame index eliminatio...David Goodwin2009-07-24
* Fix frame index elimination to correctly handle thumb-2 addressing modes that...David Goodwin2009-07-23
* Emit cross regclass register moves for thumb2.Anton Korobeynikov2009-07-16
* Major changes to Thumb (not Thumb2). Many 16-bit instructions either modifies...Evan Cheng2009-07-11
* Generalize opcode selection in ARMBaseRegisterInfo.David Goodwin2009-07-08
* Checkpoint Thumb2 Instr info work. Generalized base code so that it can be sh...David Goodwin2009-07-08
* Checkpoint refactoring of ThumbInstrInfo and ThumbRegisterInfo into Thumb1Ins...David Goodwin2009-07-02