llvm - Unofficial llvm GIT mirror used in EmbToolkit

	Commit message (Expand)	Author	Age
*	Disable the Thumb no-return call optimization:	Evan Cheng	2012-11-10
*	Add ARM TARGET2 relocation. The testcase will follow with actualy use-case.	Anton Korobeynikov	2012-11-09
*	Revert r167620; this can be implemented using an existing CL option.	Chad Rosier	2012-11-09
*	Add support for -mstrict-align compiler option for ARM targets.	Chad Rosier	2012-11-09
*	Recommit modified r167540.	Amara Emerson	2012-11-08
*	Revert r167540 until regression tests are updated.	Amara Emerson	2012-11-07
*	Improve ARM build attribute emission for architectures types.	Amara Emerson	2012-11-07
*	[arm fast-isel] Appease the machine verifier by using the proper register	Chad Rosier	2012-11-07
*	Mark the Int_eh_sjlj_dispatchsetup pseudo instruction as clobbering all	Chad Rosier	2012-11-06
*	Vext Lowering was missing opportunities	Quentin Colombet	2012-11-02
*	Revert the series of commits starting with r166578 which introduced the	Chandler Carruth	2012-11-01
*	Change ForceSizeOpt attribute into MinSize attribute	Quentin Colombet	2012-10-30
*	ARM: Better disassembly for pc-relative LDR.	Jim Grosbach	2012-10-30
*	Fix ARM's b.w instruction for thumb 2 and the encoding T4. The branch target	Kevin Enderby	2012-10-29
*	Remove TargetELFWriterInfo.	Rafael Espindola	2012-10-28
*	[code size][ARM] Emit regular call instructions instead of the move, branch s...	Quentin Colombet	2012-10-27
*	Revert r163298 "Optimize codegen for VSETLNi{8,16,32} operating on Q registers."	Jakob Stoklund Olesen	2012-10-26
*	Avoid an unused-variable warning when asserts are disabled.	Kaelyn Uhrain	2012-10-26
*	80 col.	Jakob Stoklund Olesen	2012-10-26
*	Remove ARMBaseRegisterInfo::isReservedReg().	Jakob Stoklund Olesen	2012-10-26
*	Add GPRPair Register class to ARM.	Jakob Stoklund Olesen	2012-10-26
*	Remove the canCombineSubRegIndices() target hook.	Jakob Stoklund Olesen	2012-10-26
*	[ms-inline asm] Add support for creating AsmRewrites in the target specific	Chad Rosier	2012-10-25
*	Fix a miscompilation caused by a typo. When turning a adde with negative value	Evan Cheng	2012-10-24
*	Implement a basic VectorTargetTransformInfo interface to be used by the loop ...	Nadav Rotem	2012-10-24
*	Add in support for getIntPtrType to get the pointer type based on the address...	Micah Villmow	2012-10-24
*	Make branch heavy code for generating marked up disassembly simpler	Kevin Enderby	2012-10-23
*	When a block ends in an indirect branch, add its successors to the machine ba...	Bill Wendling	2012-10-22
*	Add support for annotated disassembly output for X86 and arm.	Kevin Enderby	2012-10-22
*	ARM:	Stepan Dyatkovskiy	2012-10-19
*	Reapply the TargerTransformInfo changes, minus the changes to LSR and Lowerin...	Nadav Rotem	2012-10-18
*	Fix a bug where a 32-bit address with the high bit does not get symbolicated	Kevin Enderby	2012-10-18
*	Temporarily revert the TargetTransform changes.	Bob Wilson	2012-10-18
*	Merge MRI::isPhysRegOrOverlapUsed() into isPhysRegUsed().	Jakob Stoklund Olesen	2012-10-17
*	Issue:	Stepan Dyatkovskiy	2012-10-16
*	ARM: v1i64 and v2i64 VBSL intrinsic support.	Jim Grosbach	2012-10-15
*	Resubmit the changes to llvm core to update the functions to support differen...	Micah Villmow	2012-10-15
*	Fixed PR13938: the ARM backend was crashing because it couldn't select a VDUP...	Silviu Baranga	2012-10-15
*	[ms-inline asm] Remove the MatchInstruction() function. Previously, this was	Chad Rosier	2012-10-13
*	ARM: tail-call inside a function where part of a byval argument is on caller's	Manman Ren	2012-10-12
*	ARM: Mark VSELECT as 'expand'.	Jim Grosbach	2012-10-12
*	[ms-inline asm] Use the new API introduced in r165830 in lieu of the	Chad Rosier	2012-10-12
*	Remove unnecessary classof()'s	Sean Silva	2012-10-11
*	Revert 165732 for further review.	Micah Villmow	2012-10-11
*	Add in the first iteration of support for llvm/clang/lldb to allow variable p...	Micah Villmow	2012-10-11
*	Add isel patterns for v2f32 / v4f32 neon.vbsl intrinsics. rdar://12471808	Evan Cheng	2012-10-10
*	Add a new interface to allow IR-level passes to access codegen-specific infor...	Nadav Rotem	2012-10-10
*	Fix for LDRB instruction:	Stepan Dyatkovskiy	2012-10-10
*	Issue description:	Stepan Dyatkovskiy	2012-10-10
*	misched: Use the TargetSchedModel interface wherever possible.	Andrew Trick	2012-10-10