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* Revert: ARM: Enable use of relocation type tlsldo in debug info for tls data.Kai Nacke2014-02-04
| | | | | | | | There seems to be a new problem with the debug info in the test case. I'll have to investigate this. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200737 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM: Enable use of relocation type tlsldo in debug info for tls data.Kai Nacke2014-02-04
| | | | | | | | | This fixes PR18554. Reviewers: Renato Golin, Keith Walker git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200735 91177308-0d34-0410-b5e6-96231b3b80d8
* AArch64 & ARM: refactor crypto intrinsics to take scalarsTim Northover2014-02-03
| | | | | | | | | | | | Some of the SHA instructions take a scalar i32 as one argument (largely because they work on 160-bit hash fragments). This wasn't reflected in the IR previously, with ARM and AArch64 choosing different types (<4 x i32> and <1 x i32> respectively) which was ugly. This makes all the affected intrinsics take a uniform "i32", allowing them to become non-polymorphic at the same time. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200706 91177308-0d34-0410-b5e6-96231b3b80d8
* Unaligned access is supported on ARMv6 and ARMv7 for the NetBSD target.Joerg Sonnenberger2014-02-02
| | | | | | | Patch from Matt Thomas. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200654 91177308-0d34-0410-b5e6-96231b3b80d8
* ARMTTI: We don't have 16 allocatable scalar registersArnold Schwaighofer2014-02-01
| | | | | | | This caused an regression on libquantum after enabling the new loop vectorizer unroll heuristics. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200616 91177308-0d34-0410-b5e6-96231b3b80d8
* Reenable ARM EHABI on Android.Evgeniy Stepanov2014-01-30
| | | | | | | Broken in r200388. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200466 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM IAS: support .object_archSaleem Abdulrasool2014-01-30
| | | | | | | | | | The .object_arch directive indicates an alternative architecture to be specified in the object file. The directive does *not* effect the enabled feature bits for the object file generation. This is particularly useful when the code performs runtime detection and would like to indicate a lower architecture as the requirements than the actual instructions used. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200451 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM IAS: support .movspSaleem Abdulrasool2014-01-30
| | | | | | | | .movsp is an ARM unwinding directive that indicates to the unwinder that a register contains an offset from the current stack pointer. If the offset is unspecified, it defaults to zero. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200449 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM: suuport .tlsdescseq directiveSaleem Abdulrasool2014-01-30
| | | | | | | | | | | This enhances the ARMAsmParser to handle .tlsdescseq directives. This is a slightly special relocation. We must be able to generate them, but not consume them in assembly. The relocation is meant to assist the linker in generating a TLS descriptor sequence. The ELF target streamer is enhanced to append additional fixups into the current segment and that is used to emit the new R_ARM_TLS_DESCSEQ relocations. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200448 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM: support TLS descriptor relocationsSaleem Abdulrasool2014-01-30
| | | | | | | | Add support for tlsdesc relocations which are part of the ABI, marked as experimental. These relocations permit the linker to perform TLS reference optimizations. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200447 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM: support tlscall relocationsSaleem Abdulrasool2014-01-30
| | | | | | | | | | | | | | This adds support for TLS CALL relocations. TLS CALL relocations are used to indicate to the linker to generate appropriate entries to resolve TLS references via an appropriate function invocation (e.g. __tls_get_addr(PLT)). In order to accomodate the linker relaxation of the TLS access model for the references (GD/LD -> IE, IE -> LE), the relocation addend must be incomplete. This requires that the partial inplace value is also incomplete (i.e. 0). We simply avoid the offset value calculation at the time of the fixup adjustment in the ARM assembler backend. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200446 91177308-0d34-0410-b5e6-96231b3b80d8
* Test commitOliver Stannard2014-01-29
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200401 91177308-0d34-0410-b5e6-96231b3b80d8
* Enable EHABI by defaultRenato Golin2014-01-29
| | | | | | | | | | | | | | | | | | | | | | After all hard work to implement the EHABI and with the test-suite passing, it's time to turn it on by default and allow users to disable it as a work-around while we fix the eventual bugs that show up. This commit also remove the -arm-enable-ehabi-descriptors, since we want the tables to be printed every time the EHABI is turned on for non-Darwin ARM targets. Although MCJIT EHABI is not working yet (needs linking with the right libraries), this commit also fixes some relocations on MCJIT regarding the EH tables/lib calls, and update some tests to avoid using EH tables when none are needed. The EH tests in the test-suite that were previously disabled on ARM now pass with these changes, so a follow-up commit on the test-suite will re-enable them. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200388 91177308-0d34-0410-b5e6-96231b3b80d8
* Delete MCSubtargetInfo data members from target MCCodeEmitter classesDavid Woodhouse2014-01-28
| | | | | | | | The subtarget info is explicitly passed to the EncodeInstruction method and we should use that subtarget info to influence any encoding decisions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200350 91177308-0d34-0410-b5e6-96231b3b80d8
* Propagate MCSubtargetInfo through TableGen's getBinaryCodeForInstr()David Woodhouse2014-01-28
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200349 91177308-0d34-0410-b5e6-96231b3b80d8
* Explictly pass MCSubtargetInfo to MCCodeEmitter::EncodeInstruction()David Woodhouse2014-01-28
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200348 91177308-0d34-0410-b5e6-96231b3b80d8
* Change MCStreamer EmitInstruction interface to take subtarget infoDavid Woodhouse2014-01-28
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200345 91177308-0d34-0410-b5e6-96231b3b80d8
* [TLI] Add a new hook to TargetLowering to query the target if a load of a ↵Juergen Ributzka2014-01-28
| | | | | | | | | | | | | | | | | constant should be converted to simply the constant itself. Before this patch we used getIntImmCost from TargetTransformInfo to determine if a load of a constant should be converted to just a constant, but the threshold for this was set to an arbitrary value. This value works well for the two targets (X86 and ARM) that implement this target-hook, but it isn't target-independent at all. Now targets have the possibility to decide directly if this optimization should be performed. The default value is set to false to preserve the current behavior. The target hook has been moved to TargetLowering, which removed the last use and need of TargetTransformInfo in SelectionDAG. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200271 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM MC: Fix the initial DWARF CFI unwind info at the start of a functionMark Seaborn2014-01-27
| | | | | | | | | | | | | | | | | | | | This brings MC into line with GNU 'as' on ARM, and it brings the ARM target into line with most other LLVM targets, which declare the initial CFI state with addInitialFrameState(). Without this, functions generated with .cfi_startproc/endproc on ARM will tend to cause GDB to abort with: gdb/dwarf2-frame.c:1132: internal-error: Unknown CFA rule. I've also tested this by comparing the output of "readelf -w" on the object files produced by llvm-mc and gas when given the .s file added here. This change is part of addressing PR18636. Differential Revision: http://llvm-reviews.chandlerc.com/D2597 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200255 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix unsupported addressing mode assertion for pldDavid Peixotto2014-01-27
| | | | | | | | | | | | | | | | | | | | Summary: This commit gives an address mode to the PLD instruction. We were getting an assertion failure in the frame lowering code because we had code that was doing a pld of a stack allocated address. The frame lowering was checking the address mode and then asserting because pld had none defined. This commit fixes pld for arm mode. There was a previous fix for thumb mode in a separate commit. The commit for thumb mode added a test in a separate file because it would otherwise fail for arm. This commit moves the thumb test back into the prefetch.ll file and adds the corresponding arm test. Differential Revision: http://llvm-reviews.chandlerc.com/D2622 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200248 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove dead code.Rafael Espindola2014-01-27
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200174 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM: improve diagnostics for .word directiveSaleem Abdulrasool2014-01-26
| | | | | | | | | If a complex expression was passed to the .word directive and the first part of the directive failed to parse, a secondary diagnostic would be produced that would clutter the error diagnostics. Improve the diagnostics by consuming the remainder of the statement. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200160 91177308-0d34-0410-b5e6-96231b3b80d8
* MC: whitespaceSaleem Abdulrasool2014-01-26
| | | | | | Fix indentation, remove unnecessary line. NFC. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200158 91177308-0d34-0410-b5e6-96231b3b80d8
* Follow up of r200095. Code clean up.Evan Cheng2014-01-26
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200152 91177308-0d34-0410-b5e6-96231b3b80d8
* Pass a MCSubtargetInfo down to the TargetStreamer creation.Rafael Espindola2014-01-26
| | | | | | | With this the target streamers will be able to know the target features that are in use. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200135 91177308-0d34-0410-b5e6-96231b3b80d8
* Construct the MCStreamer before constructing the MCTargetStreamer.Rafael Espindola2014-01-26
| | | | | | | | | | This has a few advantages: * Only targets that use a MCTargetStreamer have to worry about it. * There is never a MCTargetStreamer without a MCStreamer, so we can use a reference. * A MCTargetStreamer can talk to the MCStreamer in its constructor. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200129 91177308-0d34-0410-b5e6-96231b3b80d8
* Clean up hack which is no longer needed after r198617. No functionality change.Evan Cheng2014-01-25
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200095 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert "Revert "Add Constant Hoisting Pass" (r200034)"Juergen Ributzka2014-01-25
| | | | | | | This reverts commit r200058 and adds the using directive for ARMTargetTransformInfo to silence two g++ overload warnings. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200062 91177308-0d34-0410-b5e6-96231b3b80d8
* Add final and owerride keywords to TargetTransformInfo's subclasses.Juergen Ributzka2014-01-24
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200021 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix known typosAlp Toker2014-01-24
| | | | | | | Sweep the codebase for common typos. Includes some changes to visible function names that were misspelt. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200018 91177308-0d34-0410-b5e6-96231b3b80d8
* Move emitInlineAsmEnd to the AsmPrinter interface.Rafael Espindola2014-01-24
| | | | | | | | There is no inline asm in a .s file. Therefore, there should be no logic to handle it in the streamer. Inline asm only exists in bitcode files, so the logic can live in the (long misnamed) AsmPrinter class. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200011 91177308-0d34-0410-b5e6-96231b3b80d8
* InitToTextSection is redundant with InitSections. Remove it.Rafael Espindola2014-01-23
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199955 91177308-0d34-0410-b5e6-96231b3b80d8
* [Thumbv8] Fix the value of BLXOperandIndex of isV8EligibleForITWeiming Zhao2014-01-23
| | | | | | | | | | | Originally, BLX was passed as operand #0 in MachineInstr and as operand #2 in MCInst. But now, it's operand #2 in both cases. This patch also removes unnecessary FileCheck in the test case added by r199127. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199928 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM: use litpools for normal i32 imms when compiling minsize.Tim Northover2014-01-23
| | | | | | | | | With constant-sharing, litpool loads consume 4 + N*2 bytes of code, but movw/movt pairs consume 8*N. This means litpools are better than movw/movt even with just one use. Other materialisation strategies can still be better though, so the logic is a little odd. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199891 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix inline assembly that switches between ARM and Thumb modesGreg Fitzgerald2014-01-22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch restores the ARM mode if the user's inline assembly does not. In the object streamer, it ensures that instructions following the inline assembly are encoded correctly and that correct mapping symbols are emitted. For the asm streamer, it emits a .arm or .thumb directive. This patch does not ensure that the inline assembly contains the ADR instruction to switch modes at runtime. The problem we need to solve is code like this: int foo(int a, int b) { int r = a + b; asm volatile( ".align 2 \n" ".arm \n" "add r0,r0,r0 \n" : : "r"(r)); return r+1; } If we compile this function in thumb mode then the inline assembly will switch to arm mode. We need to make sure that we switch back to thumb mode after emitting the inline assembly or we will incorrectly encode the instructions that follow (i.e. the assembly instructions for return r+1). Based on patch by David Peixotto Change-Id: Ib57f6d2d78a22afad5de8693fba6230ff56ba48b git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199818 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM IAS: add support for .unwind_raw directiveSaleem Abdulrasool2014-01-21
| | | | | | | | | | | | This implements the unwind_raw directive for the ARM IAS. The unwind_raw directive takes the form of a stack offset value followed by one or more bytes representing the opcodes to be emitted. The opcode emitted will interpreted as if it were assembled by the opcode assembler via the standard unwinding directives. Thanks to Logan Chien for an extra test! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199707 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM IAS: support .personalityindexSaleem Abdulrasool2014-01-21
| | | | | | | | | | | | | The .personalityindex directive is equivalent to the .personality directive with the ARM EABI personality with the specific index (0, 1, 2). Both of these directives indicate personality routines, so enhance the personality directive handling to take into account personalityindex. Bonus fix: flush the UnwindContext at the beginning of a new function. Thanks to Logan Chien for additional tests! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199706 91177308-0d34-0410-b5e6-96231b3b80d8
* Debug info: On ARM ensure that all __TEXT sections come before theAdrian Prantl2014-01-20
| | | | | | | | | optional DWARF sections, so compiling with -g does not result in different code being generated for PC-relative loads. This is reapplying a diet r197922 (__TEXT-only). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199681 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert "Debug info: On ARM ensure that the data sections come before the"Adrian Prantl2014-01-20
| | | | | | | | | Cut back on the cargo cult. The order of __DATA sections doesn't affect generated code. This reverts commit r197922. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199680 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove the useless pseudo instructions VDUPfdf and VDUPfqf, replacing them ↵James Molloy2014-01-20
| | | | | | with patterns to match VDUPLN. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199675 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM: add tlsldo relocationKai Nacke2014-01-20
| | | | | | | | | | Add support for the symbol(tlsldo) relocation. This is required in order to solve PR18554. Reviewed by R. Golin, A. Korobeynikov. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199644 91177308-0d34-0410-b5e6-96231b3b80d8
* [ARM] Do not generate Tag_DIV_use=AllowDIVExt when hardware div is ↵Artyom Skrobov2014-01-20
| | | | | | non-optional: it should have the default value of AllowDIVIfExists git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199638 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM ELF: ensure that the tag types are correctedSaleem Abdulrasool2014-01-19
| | | | | | | | Ensure that the tag types are reflected on a replacement. This is particularly important for the compatibility tag which has multiple representations where the last definition wins. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199577 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM: update build attributes for ABI r2.09Saleem Abdulrasool2014-01-19
| | | | | | | Update names for the names as per the current ABI errata. Mark deprecated tags as such. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199576 91177308-0d34-0410-b5e6-96231b3b80d8
* Move ARM build attributes into SupportSaleem Abdulrasool2014-01-19
| | | | | | | | | | | | This moves the ARM build attributes definitions and support routines into the Support library. The support routines simply permit the conversion of the value to and from a string representation. The movement is prompted in order to permit access to the constants and string representations from readobj in order to facilitate decoding of the attributes section. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199575 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM IAS: remove unnecessary special caseSaleem Abdulrasool2014-01-19
| | | | | | | Tag_nodefaults is even and greater than 32 and thus does not need the special check to fall into the correct category. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199574 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM: Let the assembler reject v5 instructions in v4 mode.Benjamin Kramer2014-01-18
| | | | | | PR18524. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199559 91177308-0d34-0410-b5e6-96231b3b80d8
* Add MLA alias for ARMv4 support.Renato Golin2014-01-17
| | | | | | | | | | Fix MLA defs to use register class GPRnopc. Add encoding tests for multiply instructions. (Alias for MUL/SMLAL/UMLAL added by r199026.) Patch by Zhaoshi. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199491 91177308-0d34-0410-b5e6-96231b3b80d8
* For ARM, fix assertuib failures for some ld/st 3/4 instruction with wirteback.Jiangning Liu2014-01-16
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199369 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove support for armv7f slice. <rdar://problem/12478440>Bob Wilson2014-01-15
| | | | | | This was never used for anything so we should just get rid of it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199337 91177308-0d34-0410-b5e6-96231b3b80d8
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