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* Duh. Default to ARMCC::AL (always).Evan Cheng2008-09-18
* Clean up.Evan Cheng2008-09-18
* Cosmetic.Evan Cheng2008-09-18
* Fix addrmode1 instruction encodings; fix bx_ret encoding.Evan Cheng2008-09-17
* Specify instruction encoding using range list to avoid endianess issues.Evan Cheng2008-09-17
* Reverting r56249. On further investigation, this functionality isn't needed.Bill Wendling2008-09-16
* - Change "ExternalSymbolSDNode" to "SymbolSDNode".Bill Wendling2008-09-16
* Remove isImm(), isReg(), and friends, in favor of Dan Gohman2008-09-13
* Fix random abort.Evan Cheng2008-09-13
* Define CallSDNode, an SDNode subclass for use with ISD::CALL.Dan Gohman2008-09-13
* Typo.Evan Cheng2008-09-13
* Rely on instruction format to determine so_reg operand for now.Evan Cheng2008-09-13
* Revert 56176. All those instruction formats are still needed.Evan Cheng2008-09-13
* Accidentially flipped the condition.Evan Cheng2008-09-13
* Add debug dumps.Evan Cheng2008-09-13
* Eliminate unnecessary instruction formats.Evan Cheng2008-09-12
* Addrmode 1 S bit can be dynamically set. Look for CPSR def.Evan Cheng2008-09-12
* Rewrite address mode 1 code emission routines.Evan Cheng2008-09-12
* Rename ConstantSDNode::getValue to getZExtValue, for consistencyDan Gohman2008-09-12
* udpate header comment: s/VP/VFP/Jim Grosbach2008-09-11
* Fix logic for not emitting no-dead-strip for someDale Johannesen2008-09-09
* Delete an unused variable.Dan Gohman2008-09-08
* Tidy up several unbeseeming casts from pointer to intptr_t.Dan Gohman2008-09-04
* Add intrinsics for log, log2, log10, exp, exp2.Dale Johannesen2008-09-04
* Add Mac OS X compatible JIT callback routine.Evan Cheng2008-09-02
* Revamp ARM JIT.Evan Cheng2008-09-02
* Control flow instruction encodings.Evan Cheng2008-09-01
* ldm / stm instruction encodings.Evan Cheng2008-09-01
* AXI2 and AXI3 instruction encodings.Evan Cheng2008-09-01
* Reorganize instruction formats again; AXI1 encoding.Evan Cheng2008-09-01
* addrmode3 instruction encodings.Evan Cheng2008-09-01
* Reorganize some instruction format definitions. No functionality change.Evan Cheng2008-09-01
* Rest of addrmode2 instruction encodings.Evan Cheng2008-09-01
* Addr2 word / byte load encodings.Evan Cheng2008-08-31
* Addr1 instructions opcodes are encoded in bits 21-24; encode S bit.Evan Cheng2008-08-31
* TableGen'ing instruction encodings.Evan Cheng2008-08-29
* addrmode1 (data processing) instruction encoding: bits 5-6 are 0, bits 7-10 e...Evan Cheng2008-08-29
* MVN is addrmode1.Evan Cheng2008-08-29
* More refactoring.Evan Cheng2008-08-29
* Refactor ARM instruction format definitions into a separate file. No function...Evan Cheng2008-08-28
* erect abstraction boundaries for accessing SDValue members, rename Val -> Nod...Gabor Greif2008-08-28
* disallow direct access to SDValue::ResNo, provide a getter insteadGabor Greif2008-08-26
* Make TargetInstrInfo::copyRegToReg return a bool indicating whether the copy ...Owen Anderson2008-08-26
* Switch the asmprinter (.ll) and all the stuff it requires over toChris Lattner2008-08-23
* Move the point at which FastISel taps into the SelectionDAGISelDan Gohman2008-08-23
* Simplify SelectRoot's interface, and factor out some common codeDan Gohman2008-08-21
* Use raw_ostream throughout the AsmPrinter.Owen Anderson2008-08-21
* ARM asm printer can't handle dwarf info yet.Evan Cheng2008-08-18
* Move ARM to pluggable asmprinterAnton Korobeynikov2008-08-17
* Convert uses of std::vector in TargetInstrInfo to SmallVector. This change h...Owen Anderson2008-08-14