summaryrefslogtreecommitdiff
path: root/lib/Target/ARM
Commit message (Expand)AuthorAge
* Remove unused memberDavid Blaikie2013-06-28
* Remove unused variables.Eric Christopher2013-06-28
* Bug 13662: Enable GPRPair for all i64 operands of inline asm on ARMWeiming Zhao2013-06-28
* ARM: ensure fixed-point conversions have sane typesTim Northover2013-06-28
* ARM: Fix pseudo-instructions for SRS (Store Return State).Tilmann Scheller2013-06-28
* Add a Subtarget feature 'v8fp' to the ARM backend.Joey Gouly2013-06-27
* Clarify and doxygen-ify commentsStephen Lin2013-06-26
* ARM: Proactively ensure that the LowerCallResult hack for 'this'-returns is n...Stephen Lin2013-06-26
* Minor formatting fix to ARMBaseRegisterInfo::getCalleeSavedRegsStephen Lin2013-06-26
* Add a subtarget feature 'v8' to the ARM backend.Joey Gouly2013-06-26
* ARM: fix more cases where predication may or may not be allowedTim Northover2013-06-26
* ARM: allow predicated barriers in Thumb modeTim Northover2013-06-26
* Remove the 'generic' CPU from the ARM eabi attributes printer.Joey Gouly2013-06-26
* ARM: operands should be explicit when disassembledAmaury de la Vieuville2013-06-26
* ARM: check predicate bits for thumb instructionsAmaury de la Vieuville2013-06-24
* ARM: rGPR is meant to be unpredictable, not undefinedAmaury de la Vieuville2013-06-24
* ARM: fix thumb1 nop decodingAmaury de la Vieuville2013-06-24
* ARM: fix IT decodingAmaury de la Vieuville2013-06-24
* ARM: enable decoding of pc-relative PLD/PLIAmaury de la Vieuville2013-06-24
* The getRegForInlineAsmConstraint function should only accept MVT value types.Chad Rosier2013-06-22
* DebugInfo: Don't lose unreferenced non-trivial by-value parametersDavid Blaikie2013-06-21
* ARM: Remove a (false) dependency on the memoryoperand's value as we do not useQuentin Colombet2013-06-20
* This reverts r155000.Joey Gouly2013-06-20
* DebugInfo: PR14763/r183329 correct the location of indirect parametersDavid Blaikie2013-06-19
* Access the TargetLoweringInfo from the TargetMachine object instead of cachin...Bill Wendling2013-06-19
* Access the TargetLoweringInfo from the TargetMachine object instead of cachin...Bill Wendling2013-06-19
* Access the TargetLoweringInfo from the TargetMachine object instead of cachin...Bill Wendling2013-06-19
* ARM: Add optional datatype suffix to NEON mvn asm syntax.Jim Grosbach2013-06-18
* [ARMTargetLowering] ARMISD::{SUB,ADD}{C,E} second result is a boolean implyin...Michael Gottesman2013-06-18
* Converted an overly aggressive assert to a conditional check in AddCombineTo6...Michael Gottesman2013-06-18
* Change the arm assembler to support this from the v7c spec:Kevin Enderby2013-06-18
* Reduce indentation.David Blaikie2013-06-18
* ARM: fix literal load with positive offset encodingAmaury de la Vieuville2013-06-18
* ARM: add operands pre-writeback variants when neededAmaury de la Vieuville2013-06-18
* ARM: fix thumb literal loads decodingAmaury de la Vieuville2013-06-18
* ARM: thumb stores cannot use PC as dest registerAmaury de la Vieuville2013-06-18
* Use pointers to the MCAsmInfo and MCRegInfo.Bill Wendling2013-06-18
* DebugInfo: remove target-specific Frame Index handling for DBG_VALUE MachineI...David Blaikie2013-06-16
* Debug Info: Simplify Frame Index handling in DBG_VALUE Machine InstructionsDavid Blaikie2013-06-16
* Update machine models. Specify buffer sizes for OOO processors.Andrew Trick2013-06-15
* Machine Model: Add MicroOpBufferSize and resource BufferSize.Andrew Trick2013-06-15
* ARM: fix thumb coprocessor instruction with pre-writeback disassemblyAmaury de la Vieuville2013-06-14
* Enable FastISel on ARM for Linux and NaCl, not MCJITJF Bastien2013-06-14
* ARM: fix B decodingAmaury de la Vieuville2013-06-13
* ARM: fix t2am_imm8_offset operand printing for imm=#-0Amaury de la Vieuville2013-06-13
* ARM FastISel fix sext/zext foldJF Bastien2013-06-11
* Rework r183728, suppress assert(0) for now. Its behavior depends on assertion...NAKAMURA Takumi2013-06-11
* It adds support for negative zero offsets for loads and stores.Mihai Popa2013-06-11
* This patch adds support for FPINST/FPINST2 as operands to vmsr/vmrs. These ar...Mihai Popa2013-06-11
* ARM: Enforce decoding rules for VLDn instructionsAmaury de la Vieuville2013-06-11
generated by cgit v1.2.3 (git 2.25.1) at 2024-06-07 02:47:43 +0000