| Commit message (Expand) | Author | Age |
|---|
| * | [C++11] Add 'override' keywords and remove 'virtual'. Additionally add 'final... | Craig Topper | 2014-04-29 |
| * | [C++] Use 'nullptr'. Target edition. | Craig Topper | 2014-04-25 |
| * | [Modules] Fix potential ODR violations by sinking the DEBUG_TYPE | Chandler Carruth | 2014-04-22 |
| * | Re-sort all of the includes with ./utils/sort_includes.py so that | Chandler Carruth | 2014-01-07 |
| * | Correct word hyphenations | Alp Toker | 2013-12-05 |
| * | ISelDAG: spot chain cycles involving MachineNodes | Tim Northover | 2013-09-22 |
| * | Access the TargetLoweringInfo from the TargetMachine object instead of cachin... | Bill Wendling | 2013-06-19 |
| * | Don't cache the instruction and register info from the TargetMachine, because | Bill Wendling | 2013-06-07 |
| * | Cache the TargetLowering info object as a pointer. | Bill Wendling | 2013-06-06 |
| * | Track IR ordering of SelectionDAG nodes 2/4. | Andrew Trick | 2013-05-25 |
| * | Make references to HexagonTargetMachine "const". | Krzysztof Parzyszek | 2013-05-06 |
| * | Hexagon: Remove assembler mapped instruction definitions. | Jyotsna Verma | 2013-04-23 |
| * | ArrayRefize getMachineNode(). No functionality change. | Michael Liao | 2013-04-19 |
| * | Hexagon: Add and enable memops setbit, clrbit, &,|,+,- for byte, short, and w... | Jyotsna Verma | 2013-03-22 |
| * | Hexagon: Use absolute addressing mode loads/stores for global+offset | Jyotsna Verma | 2013-02-13 |
| * | Hexagon: Use TFR_cond with cmpb.[eq,gt,gtu] to handle | Jyotsna Verma | 2013-02-05 |
| * | Use multiclass for post-increment store instructions. | Jyotsna Verma | 2013-01-29 |
| * | Move all of the header files which are involved in modelling the LLVM IR | Chandler Carruth | 2013-01-02 |
| * | Use the new script to sort the includes of every file under lib. | Chandler Carruth | 2012-12-03 |
| * | Define signed const-ext immediate operands and their predicates. | Jyotsna Verma | 2012-11-28 |
| * | Revert 156634 upon request until code improvement changes are made. | Brendon Cahoon | 2012-05-14 |
| * | Hexagon constant extender support. | Brendon Cahoon | 2012-05-11 |
| * | Hexagon V5 FP Support. | Sirish Pande | 2012-05-10 |
| * | Add an MF argument to TRI::getPointerRegClass() and TII::getRegClass(). | Jakob Stoklund Olesen | 2012-05-07 |
| * | Support for target dependent Hexagon VLIW packetizer. | Sirish Pande | 2012-05-03 |
| * | Extensions of Hexagon V4 instructions. | Sirish Pande | 2012-05-03 |
| * | Revert r155365, r155366, and r155367. All three of these have regression | Chandler Carruth | 2012-04-23 |
| * | Hexagon V5 (floating point) support. | Sirish Pande | 2012-04-23 |
| * | Convert more uses of XXXRegisterClass to &XXXRegClass. No functional change s... | Craig Topper | 2012-04-20 |
| * | This reverts a long string of commits to the Hexagon backend. These | Chandler Carruth | 2012-04-18 |
| * | Hexagon V5 (Floating Point) Support. | Sirish Pande | 2012-04-16 |
| * | Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430,... | Jia Liu | 2012-02-18 |
| * | Optimize redundant sign extends and negation of predicates. | Sirish Pande | 2012-02-15 |
| * | Revert "Optimize redundant sign extends and negation of predicates" | Eric Christopher | 2012-02-15 |
| * | Optimize redundant sign extends and negation of predicates | Sirish Pande | 2012-02-15 |
| * | Convert assert(0) to llvm_unreachable | Craig Topper | 2012-02-07 |
| * | More dead code removal (using -Wunreachable-code) | David Blaikie | 2012-01-20 |
| * | Hexagon: Remove unused variables. | Benjamin Kramer | 2011-12-18 |
| * | Hexagon backend support | Tony Linthicum | 2011-12-12 |
