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	Commit message (Expand)	Author	Age
*	reverting r209132	Jyotsna Verma	2014-05-19
*	Hexagon: Add encoding bits to the mpy instructions.	Jyotsna Verma	2014-05-19
*	Make SubRegIndex size mandatory, following r183020.	Ahmed Bougacha	2013-05-31
*	Hexagon V5 FP Support.	Sirish Pande	2012-05-10
*	Remove the SubRegClasses field from RegisterClass descriptions.	Jakob Stoklund Olesen	2012-05-04
*	Revert r155365, r155366, and r155367. All three of these have regression	Chandler Carruth	2012-04-23
*	Hexagon V5 (floating point) support.	Sirish Pande	2012-04-23
*	This reverts a long string of commits to the Hexagon backend. These	Chandler Carruth	2012-04-18
*	Hexagon V5 (Floating Point) Support.	Sirish Pande	2012-04-16
*	Fix the numbering of some of the registers and reclassify a couple of them.	Brendon Cahoon	2012-02-23
*	Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430,...	Jia Liu	2012-02-18
*	Add a CoveredBySubRegs property to Register descriptions.	Jakob Stoklund Olesen	2012-01-18
*	Hexagon backend support	Tony Linthicum	2011-12-12