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path: root/lib/Target/R600/AMDGPUISelLowering.h
Commit message (Expand)AuthorAge
* Silencing a warning about isZExtFree hiding an inherited virtual function. No...Aaron Ballman2014-06-26
* R600: Fix inconsistency in rsq instructions.Matt Arsenault2014-06-24
* R600: Remove DIV_INFMatt Arsenault2014-06-24
* R600: Remove AMDILISelLoweringMatt Arsenault2014-06-23
* R600: Use LowerSDIVREM for i64 node replaceJan Vesely2014-06-22
* R600: Implement custom SDIVREM.Jan Vesely2014-06-22
* R600/SI: Add intrinsics for various math instructions.Matt Arsenault2014-06-19
* R600: Handle fnearbyintMatt Arsenault2014-06-18
* R600/SI: Add intrinsics for brev instructionsMatt Arsenault2014-06-18
* R600: Implement f64 ftrunc, ffloor and fceil.Matt Arsenault2014-06-18
* R600: Custom lower f64 frint for pre-CIMatt Arsenault2014-06-18
* R600: Use LDS and vectors for private memoryTom Stellard2014-06-17
* R600: Move / cleanup more leftover AMDIL stuff.Matt Arsenault2014-06-15
* R600: Move division custom lowering out of AMDILISelLoweringMatt Arsenault2014-06-15
* R600: Remove dead codeMatt Arsenault2014-06-15
* R600: Mostly remove remaining AMDIL intrinsics.Matt Arsenault2014-06-12
* R600/SI: Use v_cvt_f32_ubyte* instructionsMatt Arsenault2014-06-11
* R600: Add helper functions.Matt Arsenault2014-06-11
* R600: Implement ComputeNumSignBitsForTargetNode for BFEMatt Arsenault2014-05-22
* R600: Add intrinsics for mad24Matt Arsenault2014-05-22
* Remove unused method declarationMatt Arsenault2014-05-19
* Rename ComputeMaskedBits to computeKnownBits. "Masked" has beenJay Foad2014-05-14
* R600: Move MIN/MAX matching from LowerOperation() to PerformDAGCombine()Tom Stellard2014-05-09
* [C++11] Add 'override' keywords and remove 'virtual'. Additionally add 'final...Craig Topper2014-04-29
* R600: Emit error instead of unreachable on function callMatt Arsenault2014-04-22
* R600: Minor cleanups.Matt Arsenault2014-04-18
* Move ExtractVectorElements to SelectionDAG.Matt Arsenault2014-04-11
* R600: Match 24-bit arithmetic patterns in a Target DAGCombineTom Stellard2014-04-07
* R600: Add target nodes for BFM and BFIMatt Arsenault2014-03-31
* R600: Implement isZExtFree.Matt Arsenault2014-03-27
* R600/SI: Fix unreachable with a sext_in_reg to an illegal type.Matt Arsenault2014-03-27
* R600: Move computeMaskedBitsForTargetNode out of AMDILISelLowering.cppMatt Arsenault2014-03-25
* R600: Implement isNarrowingProfitable.Matt Arsenault2014-03-24
* R600: Match sign_extend_inreg to BFE instructionsMatt Arsenault2014-03-17
* Switch all uses of LLVM_OVERRIDE to just use 'override' directly.Craig Topper2014-03-02
* R600/SI - Add new CI arithmetic instructions.Matt Arsenault2014-02-24
* R600: Always implement both versions of isTruncateFree and add a sanity check.Benjamin Kramer2014-02-12
* R600: Implement isTruncateFreeMatt Arsenault2014-02-10
* R600: Add support for global addresses with constant initializersTom Stellard2014-01-22
* R600/SI: Add support for i8 and i16 private loads/storesTom Stellard2014-01-22
* Add target hook to prevent folding some bitcasted loads.Matt Arsenault2013-11-15
* R600/SI: Add support for private address space load/storeTom Stellard2013-11-13
* R600: Custom lower f32 = uint_to_fp i64Tom Stellard2013-10-30
* R600: Fix handling of vector kernel argumentsTom Stellard2013-10-23
* R600/SI: expose TBUFFER_STORE_FORMAT_* for OpenGL transform feedbackTom Stellard2013-09-12
* R600: Add support for vector local memory loadsTom Stellard2013-08-26
* R600: Add support for v4i32 and v2i32 local storesTom Stellard2013-08-26
* R600: Add support for global vector stores with elements less than 32-bitsTom Stellard2013-08-16
* R600: Add support for i16 and i8 global storesTom Stellard2013-08-16
* R600/SI: Improve legalization of vector operationsTom Stellard2013-08-14
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