| Commit message (Expand) | Author | Age | |
|---|---|---|---|
| * | R600: Move AMDGPUInstrInfo from AMDGPUTargetMachine into AMDGPUSubtarget | Tom Stellard | 2014-06-13 |
| * | Use range for | Matt Arsenault | 2014-05-15 |
| * | Make consistent use of MCPhysReg instead of uint16_t throughout the tree. | Craig Topper | 2014-04-04 |
| * | Use llvm_unreachable instead of assert(0) | Matt Arsenault | 2013-12-10 |
| * | R600/SI: Lower BUILD_VECTOR to REG_SEQUENCE v2 | Tom Stellard | 2013-08-14 |
| * | Don't cache the instruction and register info from the TargetMachine, because | Bill Wendling | 2013-06-07 |
| * | R600: Consolidate sub register indices. | Tom Stellard | 2013-02-07 |
| * | R600: Support for indirect addressing v4 | Tom Stellard | 2013-02-06 |
| * | Update AMDGPURegisterInfo::eliminateFrameIndex() corresponding to r174083. | NAKAMURA Takumi | 2013-01-31 |
| * | Add R600 backend | Tom Stellard | 2012-12-11 |
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index : llvm | |
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