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R600
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R600ControlFlowFinalizer.cpp
Commit message (
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Author
Age
*
R600: Correctly handle vertex fetch clauses the precede ENDIFs
Tom Stellard
2014-01-23
*
R600: Recommit 199842: Add work-around for the CF stack entry HW bug
Tom Stellard
2014-01-23
*
Revert "R600: Add work-around for the CF stack entry HW bug"
Tom Stellard
2014-01-22
*
R600: Add work-around for the CF stack entry HW bug
Tom Stellard
2014-01-22
*
R600: Refactor stack size calculation
Tom Stellard
2014-01-22
*
R600: CF_PUSH is the same on Evergreen and Cayman
Tom Stellard
2014-01-22
*
R600: Workaround for cayman loop bug
Vincent Lejeune
2013-12-02
*
R600: Add IsExport bit to TableGen instruction definitions
Tom Stellard
2013-08-16
*
R600: Change the RAT instruction assembly names so they match the docs
Tom Stellard
2013-08-16
*
R600: Add 64-bit float load/store support
Tom Stellard
2013-08-01
*
R600: Remove predicated_break inst
Vincent Lejeune
2013-07-31
*
R600: Don't emit empty then clause and use alu_pop_after
Vincent Lejeune
2013-07-19
*
Make some arrays 'static const'
Craig Topper
2013-07-15
*
R600: Do not predicated basic block with multiple alu clause
Vincent Lejeune
2013-07-09
*
R600: Use EXPORT_RAT_INST_STORE_DWORD for stores on Cayman
Tom Stellard
2013-06-14
*
R600: Anti dep better handled in tex clause
Vincent Lejeune
2013-06-07
*
R600: Rework subtarget info and remove AMDILDevice classes
Tom Stellard
2013-06-07
*
Don't cache the instruction and register info from the TargetMachine, because
Bill Wendling
2013-06-07
*
R600: CALL_FS consumes a stack size entry
Vincent Lejeune
2013-06-03
*
R600: Fix R600ControlFlowFinalizer not considering VTX_READ 128 bit dst reg
Tom Stellard
2013-05-23
*
Move passes from namespace llvm into anonymous namespaces. Sort includes whil...
Benjamin Kramer
2013-05-23
*
Setting the default value (fixes CRT assertions about uninitialized variable ...
Aaron Ballman
2013-05-23
*
R600: Some factorization
Vincent Lejeune
2013-05-17
*
R600: Factorize Fetch size limit inside AMDGPUSubTarget
Vincent Lejeune
2013-05-17
*
R600: Signed literals are 64bits wide
Vincent Lejeune
2013-05-02
*
R600: use native for alu
Vincent Lejeune
2013-04-30
*
R600: Take inner dependency into tex/vtx clauses
Vincent Lejeune
2013-04-30
*
R600: Turn TEX/VTX into native instructions
Vincent Lejeune
2013-04-30
*
R600: Add FetchInst bit to instruction defs to denote vertex/tex instructions
Vincent Lejeune
2013-04-30
*
R600: Use correct CF_END instruction on Northern Island GPUs
Tom Stellard
2013-04-29
*
R600: Use .AMDGPU.config section to emit stacksize
Vincent Lejeune
2013-04-23
*
R600: Add CF_END
Vincent Lejeune
2013-04-23
*
R600ControlFlowFinalizer.cpp: Fix a warning. [-Wunused-variable]
NAKAMURA Takumi
2013-04-11
*
Whitespace.
NAKAMURA Takumi
2013-04-11
*
R600: Add VTX_READ_* and RAT_WRITE_CACHELESS_* when computing cf addr
Vincent Lejeune
2013-04-10
*
R600: Control Flow support for pre EG gen
Vincent Lejeune
2013-04-08
*
R600: Fix wrong address when substituting ENDIF
Vincent Lejeune
2013-04-04
*
R600: Take export into account when computing cf address
Vincent Lejeune
2013-04-04
*
R600: Simplify data structure and add DEBUG to R600ControlFlowFinalizer
Vincent Lejeune
2013-04-03
*
R600: Consider KILLGT as an ALU instruction
Vincent Lejeune
2013-04-03
*
R600: Add support for native control flow
Vincent Lejeune
2013-04-01