Commit message (Expand) | Author | Age | |
---|---|---|---|
* | R600: Add support for i8 and i16 local memory stores | Tom Stellard | 2013-08-26 |
* | R600: Add IsExport bit to TableGen instruction definitions | Tom Stellard | 2013-08-16 |
* | R600: Add local memory support via LDS | Tom Stellard | 2013-06-28 |
* | R600: Add ALUInst bit to tablegen definitions v2 | Tom Stellard | 2013-06-28 |
* | R600: Use new getNamedOperandIdx function generated by TableGen | Tom Stellard | 2013-06-25 |
* | R600: Relax some vector constraints on Dot4. | Vincent Lejeune | 2013-05-17 |
* | R600: Remove dead code from the CodeEmitter v2 | Tom Stellard | 2013-05-06 |
* | R600: Emit config values in register / value pairs | Tom Stellard | 2013-05-06 |
* | R600: Add a Bank Swizzle operand | Vincent Lejeune | 2013-04-30 |
* | R600: Add FetchInst bit to instruction defs to denote vertex/tex instructions | Vincent Lejeune | 2013-04-30 |
* | R600: Support for indirect addressing v4 | Tom Stellard | 2013-02-06 |
* | R600: rework handling of the constants | Tom Stellard | 2013-01-23 |
* | Add R600 backend | Tom Stellard | 2012-12-11 |