Commit message (Expand) | Author | Age | |
---|---|---|---|
* | R600: Fix scheduling of instructions that use the LDS output queue | Tom Stellard | 2013-11-15 |
* | R600/SI: Add support for private address space load/store | Tom Stellard | 2013-11-13 |
* | R600: Simplify handling of private address space | Tom Stellard | 2013-10-22 |
* | R600/SI: Lower BUILD_VECTOR to REG_SEQUENCE v2 | Tom Stellard | 2013-08-14 |
* | Don't cache the instruction and register info from the TargetMachine, because | Bill Wendling | 2013-06-07 |
* | R600: Use bottom up scheduling algorithm | Vincent Lejeune | 2013-05-17 |
* | R600: Mark all members of the TRegMem register class as reserved | Tom Stellard | 2013-02-19 |
* | R600: Consolidate sub register indices. | Tom Stellard | 2013-02-07 |
* | R600: Support for indirect addressing v4 | Tom Stellard | 2013-02-06 |
* | R600: improve inputs/interpolation handling | Tom Stellard | 2013-02-05 |
* | R600: rework handling of the constants | Tom Stellard | 2013-01-23 |
* | Add R600 backend | Tom Stellard | 2012-12-11 |