llvm - Unofficial llvm GIT mirror used in EmbToolkit

	Commit message (Expand)	Author	Age
*	Fix known typos	Alp Toker	2014-01-24
*	R600: Add support for global addresses with constant initializers	Tom Stellard	2014-01-22
*	R600/SI: Add support for i8 and i16 private loads/stores	Tom Stellard	2014-01-22
*	R600/SI: Make private pointers be 32-bit.	Matt Arsenault	2013-12-19
*	R600/SI: Fixing handling of condition codes	Tom Stellard	2013-11-22
*	R600/SI: Implement add i64, but do not yet enable.	Matt Arsenault	2013-11-18
*	R600/SI: addc / adde i32 are legal	Matt Arsenault	2013-11-18
*	R600/SI: Add support for private address space load/store	Tom Stellard	2013-11-13
*	R600/SI: Replace ffs(x) - 1 with countTrailingZeros(x)	Tom Stellard	2013-10-23
*	R600/SI: fix MIMG writemask adjustement	Tom Stellard	2013-10-23
*	R600: Fix handling of vector kernel arguments	Tom Stellard	2013-10-23
*	R600/SI: Remove some leftover MI dump call	Vincent Lejeune	2013-10-15
*	R600/SI: Support byval arguments	Vincent Lejeune	2013-10-13
*	Fix typo	Matt Arsenault	2013-10-10
*	R600/SI: Define a separate MIMG instruction for each possible output value type	Tom Stellard	2013-10-10
*	R600/SI: expose TBUFFER_STORE_FORMAT_* for OpenGL transform feedback	Tom Stellard	2013-09-12
*	R600: Fix i64 to i32 trunc on SI	Matt Arsenault	2013-09-05
*	R600: Add support for vector local memory loads	Tom Stellard	2013-08-26
*	SelectionDAG: Use correct pointer size when lowering function arguments v2	Tom Stellard	2013-08-26
*	R600: Allocate memoperand in the MachienFunction so it doesn't leak.	Benjamin Kramer	2013-08-16
*	R600/SI: Improve legalization of vector operations	Tom Stellard	2013-08-14
*	R600/SI: Replace v1i32 type with i32 in imageload and sample intrinsics	Tom Stellard	2013-08-14
*	R600/SI: Convert v16i8 resource descriptors to i128	Tom Stellard	2013-08-14
*	R600/SI: Assign a register class to the $vaddr operand for MIMG instructions	Tom Stellard	2013-08-14
*	R600/SI: FMA is faster than fmul and fadd for f64	Niels Ole Salscheider	2013-08-10
*	R600/SI: Implement fp32<->fp64 conversions	Niels Ole Salscheider	2013-08-08
*	R600/SI: Use VSrc_* register classes as the default classes for types	Tom Stellard	2013-08-06
*	R600/SI: Add more special cases for opcodes to ensureSRegLimit()	Tom Stellard	2013-08-06
*	R600/SI: Custom lower i64 ZERO_EXTEND	Tom Stellard	2013-08-01
*	R600: Improve support for < 32-bit loads	Tom Stellard	2013-07-23
*	R600/SI: Fix crash with VSELECT	Tom Stellard	2013-07-18
*	R600/SI: Add support for 64-bit loads	Tom Stellard	2013-07-15
*	R600/SI: Add double precision fsub pattern for SI	Tom Stellard	2013-07-12
*	R600/SI: Add initial double precision support for SI	Tom Stellard	2013-07-12
*	R600/SI: Initial local memory support	Michel Danzer	2013-07-10
*	R600: Consolidate expansion of v2i32/v4i32 ops for EG/SI	Aaron Watry	2013-06-25
*	R600/SI: Expand xor v2i32/v4i32	Aaron Watry	2013-06-25
*	R600/SI: Expand urem of v2i32/v4i32 for SI	Aaron Watry	2013-06-25
*	R600/SI: Expand udiv v[24]i32 for SI and v2i32 for EG	Aaron Watry	2013-06-25
*	R600/SI: Expand ashr of v2i32/v4i32 for SI	Aaron Watry	2013-06-25
*	R600/SI: Expand srl of v2i32/v4i32 for SI	Aaron Watry	2013-06-25
*	R600/SI: Expand shl of v2i32/v4i32 for SI	Aaron Watry	2013-06-25
*	R600/SI: Expand or of v2i32/v4i32 for SI	Aaron Watry	2013-06-25
*	R600/SI: Expand mul of v2i32/v4i32 for SI	Aaron Watry	2013-06-25
*	R600/SI: Expand and of v2i32/v4i32 for SI	Aaron Watry	2013-06-25
*	R600/SI: Report unaligned memory accesses as legal for > 32-bit types	Tom Stellard	2013-06-25
*	R600/SI: Expand sub for v2i32 and v4i32 for SI	Tom Stellard	2013-06-20
*	R600/SI: Expand add for v2i32 and v4i32	Tom Stellard	2013-06-20
*	R600: Rework subtarget info and remove AMDILDevice classes	Tom Stellard	2013-06-07
*	Don't cache the instruction and register info from the TargetMachine, because	Bill Wendling	2013-06-07