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path: root/lib/Target/R600/SIInstructions.td
Commit message (Expand)AuthorAge
* R600/SI: Use a ComplexPattern for MUBUF storesTom Stellard2014-06-24
* R600: Promote i64 stores to v2i32Tom Stellard2014-06-24
* R600: Fix inconsistency in rsq instructions.Matt Arsenault2014-06-24
* R600/SI: Move pattern to instruction definitionMatt Arsenault2014-06-24
* R600/SI: Fix div_scale intrinsic.Matt Arsenault2014-06-23
* R600/SI: Add patterns for ctpop inside a branchTom Stellard2014-06-20
* R600/SI: Add a pattern for f32 ftruncTom Stellard2014-06-20
* R600/SI: Add a VALU pattern for i64 xorTom Stellard2014-06-20
* R600/SI: Add intrinsics for various math instructions.Matt Arsenault2014-06-19
* R600/SI: add gather4 and getlod intrinsics (v3)Marek Olsak2014-06-18
* R600/SI: Add intrinsics for brev instructionsMatt Arsenault2014-06-18
* R600/SI: Comparisons set vcc.Matt Arsenault2014-06-18
* R600/SI: Match cttz_zero_undefMatt Arsenault2014-06-17
* R600/SI: Match ctlz_zero_undefMatt Arsenault2014-06-17
* R600: Use LDS and vectors for private memoryTom Stellard2014-06-17
* R600/SI: Add a pattern for llvm.AMDGPU.barrier.globalTom Stellard2014-06-17
* R600: Remove AMDIL instruction and register definitionsTom Stellard2014-06-13
* R600: Mostly remove remaining AMDIL intrinsics.Matt Arsenault2014-06-12
* R600/SI: Use a register set to -1 for data0 on ds_inc*/ds_dec*Matt Arsenault2014-06-12
* R600/SI: Fix bitcast between v2i32 and f64Matt Arsenault2014-06-11
* R600/SI: Update place using old subtarget predicateMatt Arsenault2014-06-11
* R600/SI: Add common 64-bit LDS atomicsMatt Arsenault2014-06-11
* R600/SI: Add instruction definitions for 64-bit LDS atomicsMatt Arsenault2014-06-11
* R600/SI: Add 32-bit LDS atomic cmpxchgMatt Arsenault2014-06-11
* R600/SI: Use LDS atomic inc / decMatt Arsenault2014-06-11
* R600/SI: Add other LDS atomic operationsMatt Arsenault2014-06-11
* R600/SI: Add instruction definitions for more LDS opsMatt Arsenault2014-06-11
* R600/SI: Fix backwards names for local atomic instructions.Matt Arsenault2014-06-11
* R600/SI: Refactor local atomics.Matt Arsenault2014-06-11
* R600/SI: Use v_cvt_f32_ubyte* instructionsMatt Arsenault2014-06-11
* R600/SI: Fix selection failure on scalar_to_vectorMatt Arsenault2014-06-11
* R600/SI: Fix a crash when spilling SGPRsTom Stellard2014-06-10
* R600/SI: Implement i64 ctpopMatt Arsenault2014-06-10
* R600/SI: Use bcnt instruction for ctpopMatt Arsenault2014-06-10
* R600: Handle fcopysignMatt Arsenault2014-06-10
* R600/SI: Handle sign_extend and zero_extend to i64 with patterns.Matt Arsenault2014-06-10
* R600/SI: Rename VOP3 helper class to be more generalMatt Arsenault2014-06-09
* R600/SI: Keep 64-bit not on SALUMatt Arsenault2014-06-09
* R600/SI: Match rsq instructionsMatt Arsenault2014-06-05
* R600/SI: Remove redundant patternsMatt Arsenault2014-05-31
* R600/SI: Fix [s|u]int_to_fp for i1Matt Arsenault2014-05-31
* R600/SI: Fix pattern variable names.Matt Arsenault2014-05-29
* R600: Add intrinsics for mad24Matt Arsenault2014-05-22
* R600/SI: Move instruction pattern to instruction definitionMatt Arsenault2014-05-22
* R600/SI: Match fp_to_uint / uint_to_fp for f64Matt Arsenault2014-05-22
* R600/SI: Refactor the VOP3_32 tablegen classTom Stellard2014-05-16
* R600/SI: Add a PredicateControl class for managing TableGen predicatesTom Stellard2014-05-16
* R600/SI: Move tablegen patterns away from instruction defsTom Stellard2014-05-16
* R600/SI: Remove unused instructionTom Stellard2014-05-16
* R600/SI: Promote f32 SELECT to i32Tom Stellard2014-05-16
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