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path: root/lib/Target/R600
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* R600: Remove \ at EOL from ascii art comments.Benjamin Kramer2013-10-18
* R600: Fix a crash in the AMDILCFGStructurizerTom Stellard2013-10-16
* R600: Remove some dead code from the AMDILCFGStructurizerTom Stellard2013-10-16
* Fix typoMatt Arsenault2013-10-15
* Fix missing C++ mode thing in headerMatt Arsenault2013-10-15
* R600/SI: Remove some leftover MI dump callVincent Lejeune2013-10-15
* R600: improve dump of S_WAITCNTVincent Lejeune2013-10-13
* R600/SI: Add SinkingPass before ISelVincent Lejeune2013-10-13
* R600/SI: Support byval argumentsVincent Lejeune2013-10-13
* R600: Use masked read sel for texture instructionsVincent Lejeune2013-10-13
* R600: fix swizzle exportVincent Lejeune2013-10-13
* R600: Clear the VPM bit of export instructions.Vincent Lejeune2013-10-13
* R600: Store disassembly in a special ELF section when feature +DumpCode is en...Tom Stellard2013-10-12
* Fix typoMatt Arsenault2013-10-11
* Fix typoMatt Arsenault2013-10-10
* R600: Fix trunc i64 to i32 on SIMatt Arsenault2013-10-10
* R600/SI: Implement SIInstrInfo::verifyInstruction() for VOP*Tom Stellard2013-10-10
* R600/SI: Define a separate MIMG instruction for each possible output value typeTom Stellard2013-10-10
* R600/SI: Mark the EXEC register as reservedTom Stellard2013-10-10
* R600: Use StructurizeCFGPass for non SI targetsTom Stellard2013-10-10
* Add a MCTargetStreamer interface.Rafael Espindola2013-10-08
* R600: Add a ldptr intrinsic to support MSAA.Vincent Lejeune2013-10-02
* R600: add a pass that merges clauses.Vincent Lejeune2013-10-01
* R600: Put PRED_X instruction in its own clauseVincent Lejeune2013-10-01
* R600: Enable -verify-machineinstrs in some tests.Vincent Lejeune2013-10-01
* IfConverter: Use TargetSchedule for instruction latenciesArnold Schwaighofer2013-09-30
* Even more spelling fixes for "instruction".Robert Wilhelm2013-09-28
* R600: Fix handling of NAN in comparison instructionsTom Stellard2013-09-28
* SelectionDAG: Improve legalization of SELECT_CC with illegal condition codesTom Stellard2013-09-28
* SelectionDAG: Try to expand all condition codes using getCCSwappedOperands()Tom Stellard2013-09-28
* MC: Remove vestigial PCSymbol field from AsmInfoDavid Majnemer2013-09-25
* ISelDAG: spot chain cycles involving MachineNodesTim Northover2013-09-22
* Allow subtarget selection of the default MachineScheduler and document the in...Andrew Trick2013-09-20
* R600: Move clamp handling code to R600IselLowering.cppVincent Lejeune2013-09-12
* R600: Move code handling literal folding into R600ISelLowering.Vincent Lejeune2013-09-12
* R600: Move fabs/fneg/sel folding logic into PostProcessIselVincent Lejeune2013-09-12
* R600/SI: expose TBUFFER_STORE_FORMAT_* for OpenGL transform feedbackTom Stellard2013-09-12
* R600: Don't use trans slot for instructions that read LDS source registersTom Stellard2013-09-12
* Generate compact unwind encoding from CFI directives.Bill Wendling2013-09-09
* R600: Add support for LDS atomic subtractAaron Watry2013-09-06
* R600: Coding styleTom Stellard2013-09-05
* R600: Fix i64 to i32 trunc on SIMatt Arsenault2013-09-05
* R600: Add support for local memory atomic addTom Stellard2013-09-05
* R600: Expand SELECT nodes rather than custom lowering themTom Stellard2013-09-05
* R600: Fix incorrect LDS size calculationTom Stellard2013-09-05
* R600/SI: Don't emit S_WQM_B64 instruction for compute shadersTom Stellard2013-09-05
* R600: Fix segfault in R600TextureIntrinsicReplacerTom Stellard2013-09-05
* R600: Use shared op optimization when checking cycle compatibilityVincent Lejeune2013-09-04
* R600: Non vector only instruction can be scheduled on trans unitVincent Lejeune2013-09-04
* R600: Use SchedModel enum for is{Trans,Vector}Only functionsVincent Lejeune2013-09-04