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R600
Commit message (
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Author
Age
*
R600: Remove \ at EOL from ascii art comments.
Benjamin Kramer
2013-10-18
*
R600: Fix a crash in the AMDILCFGStructurizer
Tom Stellard
2013-10-16
*
R600: Remove some dead code from the AMDILCFGStructurizer
Tom Stellard
2013-10-16
*
Fix typo
Matt Arsenault
2013-10-15
*
Fix missing C++ mode thing in header
Matt Arsenault
2013-10-15
*
R600/SI: Remove some leftover MI dump call
Vincent Lejeune
2013-10-15
*
R600: improve dump of S_WAITCNT
Vincent Lejeune
2013-10-13
*
R600/SI: Add SinkingPass before ISel
Vincent Lejeune
2013-10-13
*
R600/SI: Support byval arguments
Vincent Lejeune
2013-10-13
*
R600: Use masked read sel for texture instructions
Vincent Lejeune
2013-10-13
*
R600: fix swizzle export
Vincent Lejeune
2013-10-13
*
R600: Clear the VPM bit of export instructions.
Vincent Lejeune
2013-10-13
*
R600: Store disassembly in a special ELF section when feature +DumpCode is en...
Tom Stellard
2013-10-12
*
Fix typo
Matt Arsenault
2013-10-11
*
Fix typo
Matt Arsenault
2013-10-10
*
R600: Fix trunc i64 to i32 on SI
Matt Arsenault
2013-10-10
*
R600/SI: Implement SIInstrInfo::verifyInstruction() for VOP*
Tom Stellard
2013-10-10
*
R600/SI: Define a separate MIMG instruction for each possible output value type
Tom Stellard
2013-10-10
*
R600/SI: Mark the EXEC register as reserved
Tom Stellard
2013-10-10
*
R600: Use StructurizeCFGPass for non SI targets
Tom Stellard
2013-10-10
*
Add a MCTargetStreamer interface.
Rafael Espindola
2013-10-08
*
R600: Add a ldptr intrinsic to support MSAA.
Vincent Lejeune
2013-10-02
*
R600: add a pass that merges clauses.
Vincent Lejeune
2013-10-01
*
R600: Put PRED_X instruction in its own clause
Vincent Lejeune
2013-10-01
*
R600: Enable -verify-machineinstrs in some tests.
Vincent Lejeune
2013-10-01
*
IfConverter: Use TargetSchedule for instruction latencies
Arnold Schwaighofer
2013-09-30
*
Even more spelling fixes for "instruction".
Robert Wilhelm
2013-09-28
*
R600: Fix handling of NAN in comparison instructions
Tom Stellard
2013-09-28
*
SelectionDAG: Improve legalization of SELECT_CC with illegal condition codes
Tom Stellard
2013-09-28
*
SelectionDAG: Try to expand all condition codes using getCCSwappedOperands()
Tom Stellard
2013-09-28
*
MC: Remove vestigial PCSymbol field from AsmInfo
David Majnemer
2013-09-25
*
ISelDAG: spot chain cycles involving MachineNodes
Tim Northover
2013-09-22
*
Allow subtarget selection of the default MachineScheduler and document the in...
Andrew Trick
2013-09-20
*
R600: Move clamp handling code to R600IselLowering.cpp
Vincent Lejeune
2013-09-12
*
R600: Move code handling literal folding into R600ISelLowering.
Vincent Lejeune
2013-09-12
*
R600: Move fabs/fneg/sel folding logic into PostProcessIsel
Vincent Lejeune
2013-09-12
*
R600/SI: expose TBUFFER_STORE_FORMAT_* for OpenGL transform feedback
Tom Stellard
2013-09-12
*
R600: Don't use trans slot for instructions that read LDS source registers
Tom Stellard
2013-09-12
*
Generate compact unwind encoding from CFI directives.
Bill Wendling
2013-09-09
*
R600: Add support for LDS atomic subtract
Aaron Watry
2013-09-06
*
R600: Coding style
Tom Stellard
2013-09-05
*
R600: Fix i64 to i32 trunc on SI
Matt Arsenault
2013-09-05
*
R600: Add support for local memory atomic add
Tom Stellard
2013-09-05
*
R600: Expand SELECT nodes rather than custom lowering them
Tom Stellard
2013-09-05
*
R600: Fix incorrect LDS size calculation
Tom Stellard
2013-09-05
*
R600/SI: Don't emit S_WQM_B64 instruction for compute shaders
Tom Stellard
2013-09-05
*
R600: Fix segfault in R600TextureIntrinsicReplacer
Tom Stellard
2013-09-05
*
R600: Use shared op optimization when checking cycle compatibility
Vincent Lejeune
2013-09-04
*
R600: Non vector only instruction can be scheduled on trans unit
Vincent Lejeune
2013-09-04
*
R600: Use SchedModel enum for is{Trans,Vector}Only functions
Vincent Lejeune
2013-09-04
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