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path: root/lib/Target/Sparc/SparcRegisterInfo.td
Commit message (Expand)AuthorAge
* [Sparc] Add register class for floating point conditional flags (%fcc0 - %fcc3).Venkatraman Govindaraju2014-03-02
* Add a dwarf number to the Y register.Roman Divacky2014-02-24
* [Sparc] Added V9's extra floating point registers and their aliases.Venkatraman Govindaraju2013-08-25
* [Sparc] Use HWEncoding instead of unused Num field in Sparc register definiti...Venkatraman Govindaraju2013-08-20
* Sparc: No functionality change. Cleanup whitespaces, comment formatting etc.,Venkatraman Govindaraju2013-06-04
* Make SubRegIndex size mandatory, following r183020.Ahmed Bougacha2013-05-31
* [Sparc] Add support for leaf functions in sparc backend. Venkatraman Govindaraju2013-05-29
* [Sparc] Rearrange integer registers' allocation order so that register alloca...Venkatraman Govindaraju2013-05-19
* Add 64-bit compare + branch for SPARC v9.Jakob Stoklund Olesen2013-04-03
* Add an I64Regs register class for 64-bit registers.Jakob Stoklund Olesen2013-04-02
* Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430,...Jia Liu2012-02-18
* Add a CoveredBySubRegs property to Register descriptions.Jakob Stoklund Olesen2012-01-18
* Use set operations instead of plain lists to enumerate register classes.Jakob Stoklund Olesen2011-06-15
* Remove custom allocation order boilerplate that is no longer needed.Jakob Stoklund Olesen2011-06-09
* Fix to match the dwarf register numbers that gdb uses.Rafael Espindola2011-05-29
* Multiple SPARC backend fixes: added Y register; updated select_cc, subx, subx...Venkatraman Govindaraju2010-12-28
* Replace the SubRegSet tablegen class with a less error-prone mechanism.Jakob Stoklund Olesen2010-05-26
* Revert "Replace the SubRegSet tablegen class with a less error-prone mechanism."Jakob Stoklund Olesen2010-05-26
* Replace the SubRegSet tablegen class with a less error-prone mechanism.Jakob Stoklund Olesen2010-05-26
* several major improvements to the sparc backend: support for weak linkageChris Lattner2009-09-15
* Remove attribution from file headers, per discussion on llvmdev.Chris Lattner2007-12-29
* Use TableGen to emit information for dwarf register numbers. Anton Korobeynikov2007-11-11
* Fix for PR1540: Specify F0, F1 are sub-registers of D0, etc.Evan Cheng2007-07-13
* Constify some methods. Patch provided by Anton Vayvod, thanks!Chris Lattner2006-08-17
* D'oh - should be even numbered.Jim Laskey2006-03-24
* Add dwarf register numbering to register data.Jim Laskey2006-03-24
* Update to new-style flags usage, simplifying the .td fileChris Lattner2006-02-10
* Rename SPARC V8 target to be the LLVM SPARC target.Chris Lattner2006-02-05
* Reserve G1 for frame offset stuff and use it to handle large stack frames.Chris Lattner2005-12-20
* Elimiante SP and FP, which weren't members of the IntRegs register classChris Lattner2005-12-19
* Add initial conditional branch support. This doesn't actually work yet dueChris Lattner2005-12-18
* Add patterns for multiply, simplify Y register handling stuff, add RDY instru...Chris Lattner2005-12-17
* Support multiple ValueTypes per RegisterClass, needed for upcoming vectorNate Begeman2005-12-01
* Split RegisterClass 'Methods' into MethodProtos and MethodBodiesChris Lattner2005-08-19
* put reg classes in namespacesChris Lattner2005-08-19
* Make this file self-contained.Brian Gaeke2004-12-10
* Allocate fewer registers and tighten up alignment restrictions.Brian Gaeke2004-11-18
* SparcV8 int regs are not only 32-bits in width, but they are 32-bit aligned!Misha Brukman2004-09-27
* Fix the copy-pasto that Brian noticed: V8 int regs are 32-bits wide, not 64.Misha Brukman2004-09-26
* Use the V8/V9 shared register file descriptionMisha Brukman2004-09-22
* Changes to make this work with Jason's patch. I checked this by hand, butChris Lattner2004-09-13
* Convert bytes to bits in alignmentChris Lattner2004-08-21
* Make the double-fp pseudo registers be "NamedRegs".Brian Gaeke2004-06-24
* The long integer pseudo-regs are history. So long, we hardly knew ye.Brian Gaeke2004-06-24
* Add pseudo-registers and register class for 64-bit integer values.Brian Gaeke2004-06-22
* Mess around with allocation order. In particular, I think we ought to beBrian Gaeke2004-06-18
* Merge my changes with briansChris Lattner2004-04-07
* Add support for the "Y" register, used by MUL & DIV.Brian Gaeke2004-04-07
* Avoid allocating special registers a bit more robustlyChris Lattner2004-03-08
* Hack it so we do not try to allocate values to G0.Brian Gaeke2004-03-06