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X86
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X86.td
Commit message (
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Author
Age
*
[X86] Use ADD/SUB instead of INC/DEC for Silvermont
Alexey Volkov
2014-06-09
*
[X86] Tune LEA usage for Silvermont
Alexey Volkov
2014-05-20
*
[x86] Make the 'x86-64' cpu, what I see as and many use as the generic
Chandler Carruth
2014-05-07
*
Add a description for AMD's bdver4 (aka Excavator).
Benjamin Kramer
2014-05-02
*
Enable FeatureFastUAMem for Silvermont processor
Alexey Volkov
2014-03-07
*
Test commit
Alexey Volkov
2014-03-07
*
[x86] Add basic support for .code16
Craig Topper
2014-01-06
*
Change the default of AsmWriterClassName and isMCAsmWriter.
Rafael Espindola
2013-12-02
*
SHLD/SHRD are VectorPath (microcode) instructions known to have poor latency ...
Ekaterina Romanova
2013-11-21
*
X86: Add a description for AMD bdver3 aka Steamroller.
Benjamin Kramer
2013-11-04
*
Enabling 3DNow! prefetch instruction for a few AMD processors: bobcat, jaguar,
Yunzhong Gao
2013-10-16
*
Rename this feature to "cx16" to match gcc's flag name. Apparently these strings
Nick Lewycky
2013-10-05
*
Adding a feature flag to the llvm backend for x86 TBM instruction set.
Yunzhong Gao
2013-09-24
*
Remove unused code, which had been commented out.
Preston Gurd
2013-09-17
*
Make F16C feature flag imply AVX rather than just checking both at the patterns.
Craig Topper
2013-09-16
*
Adds support for Atom Silvermont (SLM) - -march=slm
Preston Gurd
2013-09-13
*
Partial support for Intel SHA Extensions (sha1rnds4)
Ben Langmuir
2013-09-12
*
X86: Add a description of the Intel Atom Silvermont CPU.
Benjamin Kramer
2013-08-30
*
Rename features to match what gcc and clang use.
Rafael Espindola
2013-08-23
*
Rename mattr names for AVX-512 to from avx-512 -> avx512f, avx-512-pfi -> av5...
Craig Topper
2013-08-21
*
Added encoding prefixes for KNL instructions (EVEX).
Elena Demikhovsky
2013-07-28
*
I'm starting to commit KNL backend. I'll push patches one-by-one. This patch ...
Elena Demikhovsky
2013-07-24
*
X86: Add target description for btver2; make autodetection logic aware of AVX.
Benjamin Kramer
2013-05-03
*
This patch adds the X86FixupLEAs pass, which will reduce instruction
Preston Gurd
2013-04-25
*
[asm parser] Add support for predicating MnemonicAlias based on the assembler
Chad Rosier
2013-04-18
*
Add support of RDSEED defined in AVX2 extension
Michael Liao
2013-03-28
*
Add the Haswell machine model.
Nadav Rotem
2013-03-28
*
For the current Atom processor, the fastest way to handle a call
Preston Gurd
2013-03-27
*
Add HLE target feature
Michael Liao
2013-03-26
*
Enable SandyBridgeModel for all modern Intel P6 descendants.
Jakob Stoklund Olesen
2013-03-26
*
Add PREFETCHW codegen support
Michael Liao
2013-03-26
*
added basic support for Intel ADX instructions
Kay Tiong Khoo
2013-02-14
*
Pad Short Functions for Intel Atom
Preston Gurd
2013-01-08
*
Revert revision 171524. Original message:
Nadav Rotem
2013-01-05
*
The current Intel Atom microarchitecture has a feature whereby when a function
Preston Gurd
2013-01-04
*
Make '-mtune=x86_64' assume fast unaligned memory accesses.
Chandler Carruth
2012-12-15
*
Revert "Make '-mtune=x86_64' assume fast unaligned memory accesses."
Chandler Carruth
2012-12-10
*
Make '-mtune=x86_64' assume fast unaligned memory accesses.
Chandler Carruth
2012-12-10
*
Address a FIXME and update the fast unaligned memory feature for newer
Chandler Carruth
2012-12-10
*
Add support of RTM from TSX extension
Michael Liao
2012-11-08
*
Atom has SIMD instruction set extension up to SSSE3
Michael Liao
2012-10-25
*
Fix 80-column violation
Craig Topper
2012-10-03
*
Add support for AMD Geode.
Roman Divacky
2012-09-12
*
Generic Bypass Slow Div
Preston Gurd
2012-09-04
*
Patch to enable FMA on bdver2 target. Make XOP feature enable FMA4 as well.
Anitha Boyapati
2012-08-16
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162010 91177308-0d34...
Anitha Boyapati
2012-08-16
*
I'm introducing a new machine model to simultaneously allow simple
Andrew Trick
2012-07-07
*
Rename FMA3 feature flag to just FMA to match gcc so it can be added to clang.
Craig Topper
2012-06-03
*
X86: Rename the CLMUL target feature to PCLMUL.
Benjamin Kramer
2012-05-31
*
Make XOP and FMA4 require SSE4A to match GCC behavior. Use this to simplify B...
Craig Topper
2012-05-01
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