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path: root/lib/Target/X86/X86InstrInfo.td
Commit message (Expand)AuthorAge
* Add support of RTM from TSX extensionMichael Liao2012-11-08
* Add __builtin_setjmp/_longjmp supprt in X86 backendMichael Liao2012-10-15
* Separate AVXCC and SSECC printing for cmpps/pd/ss/sd and add masking before t...Craig Topper2012-10-09
* Remove hasNoAVX method. Can just invert hasAVX instead.Craig Topper2012-09-26
* Revise td of X86 atomic instructionsMichael Liao2012-09-21
* Revert r163761 "Don't fold indexed loads into TCRETURNmi64."Jakob Stoklund Olesen2012-09-13
* Don't fold indexed loads into TCRETURNmi64.Jakob Stoklund Olesen2012-09-13
* Update function names to conform to guidelines. No functional change intended.Chad Rosier2012-09-10
* Introduce 'UseSSEx' to force SSE legacy encodingMichael Liao2012-08-30
* Add HasAVX1Only predicate and use it for patterns that have an AVX1 instructi...Craig Topper2012-08-27
* X86MemBarrier has unmodeled side effects.Jakob Stoklund Olesen2012-08-24
* Make x86 asm parser to check for xmm vs ymm for index register in gather inst...Craig Topper2012-07-18
* Give the rdrand instructions a SideEffect flag and a chain so MachineCSE and ...Benjamin Kramer2012-07-12
* Add intrinsics for Ivy Bridge's rdrand instruction.Benjamin Kramer2012-07-12
* X86: add more GATHER intrinsics in LLVMManman Ren2012-06-29
* X86: add GATHER intrinsics (AVX2) in LLVMManman Ren2012-06-26
* Rename FMA3 feature flag to just FMA to match gcc so it can be added to clang.Craig Topper2012-06-03
* Implement the local-dynamic TLS model for x86 (PR3985)Hans Wennborg2012-06-01
* X86: Rename the CLMUL target feature to PCLMUL.Benjamin Kramer2012-05-31
* Added X86 Atom latencies for instructions in X86InstrInfo.td.Preston Gurd2012-05-10
* Use ptr_rc_tailcall instead of GR32_TC.Jakob Stoklund Olesen2012-05-09
* X86: Don't emit conditional floating point moves on when targeting pre-pentiu...Benjamin Kramer2012-04-27
* Add support for AVX enhanced comparison predicates. Patch from Kay Tiong Khoo.Craig Topper2012-04-03
* Fix the operand ordering on aliases for shld and shrd. PR12173, part 2.Eli Friedman2012-03-06
* Make aliases for shld and shrd match gas. PR12173.Eli Friedman2012-03-05
* Add q suffix aliases for the fistp and fisttp mnemonics.Chad Rosier2012-02-27
* Add WIN_FTOL_* psudo-instructions to model the unique calling conventionMichael J. Spencer2012-02-24
* Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430,...Jia Liu2012-02-18
* Add X86 assembler and disassembler support for AMD SVM instructions. Original...Craig Topper2012-02-18
* Use the same CALL instructions for Windows as for everything else.Jakob Stoklund Olesen2012-02-16
* Intel syntax: Fix parser match class to check memory operand size.Devang Patel2012-01-17
* Get rid of unused codegen-only instruction.Eli Friedman2012-01-16
* Add predicate method check match memory operand size, if available.Devang Patel2012-01-12
* Instruction selection priority fixes to remove the XMM/XMMInt/orAVX predicate...Craig Topper2012-01-10
* Don't disable MMX support when AVX is enabled. Fix predicates for MMX instruc...Craig Topper2012-01-09
* Allow CRC32 instructions to be selected when AVX is enabled.Craig Topper2012-01-01
* Fix sfence, lfence, mfence, and clflush to be able to be selected when AVX is...Craig Topper2012-01-01
* XOP instructions and encoding tests.Jan Sjödin2011-12-12
* Remove hasSSE1orAVX(). It's the same as hasXMM().Evan Cheng2011-12-09
* Many of the SSE patterns should not be selected when AVX is available. This l...Evan Cheng2011-12-08
* Make X86::FsFLD0SS / FsFLD0SD real pseudo-instructions.Jakob Stoklund Olesen2011-11-29
* X86: alias cqo to cqto.Benjamin Kramer2011-11-24
* Add intrinsics and feature flag for read/write FS/GS base instructions. Also ...Craig Topper2011-10-30
* Change the sysexit mnemonic (and sysexitl) to never have the REX.W prefix andKevin Enderby2011-10-27
* Remove intrinsics for X86 BLSI, BLSMSK, and BLSR intrinsics and replace with ...Craig Topper2011-10-21
* Rename PEXTR to PEXT. Add intrinsics for BMI instructions.Craig Topper2011-10-19
* Remove NaClModeDavid Meyer2011-10-18
* Add X86 PEXTR and PDEP instructions.Craig Topper2011-10-16
* Add X86 BZHI instruction as well as BMI2 feature detection.Craig Topper2011-10-16
* Add X86 BEXTR instruction. This instruction uses VEX.vvvv to encode Operand 3...Craig Topper2011-10-16