| Commit message (Expand) | Author | Age |
|---|
| * | [x86] Fix disassembly of MOV16ao16 et al. | David Woodhouse | 2014-01-20 |
| * | [x86] Fix 16-bit disassembly of JCXZ/JECXZ | David Woodhouse | 2014-01-20 |
| * | [x86] Rename MOVSD/STOSD/LODSD/OUTSD to MOVSL/STOSL/LODSL/OUTSL | David Woodhouse | 2014-01-20 |
| * | [x86] Fix disassembly of callw instruction | David Woodhouse | 2014-01-20 |
| * | [x86] Fix 16-bit handling of OpSize bit | David Woodhouse | 2014-01-20 |
| * | [x86] Infer disassembler mode from SubtargetInfo feature bits | David Woodhouse | 2014-01-20 |
| * | [x86] Support i386-*-*-code16 triple for emitting 16-bit code | David Woodhouse | 2014-01-20 |
| * | ARM: add tlsldo relocation | Kai Nacke | 2014-01-20 |
| * | [ARM] Do not generate Tag_DIV_use=AllowDIVExt when hardware div is non-option... | Artyom Skrobov | 2014-01-20 |
| * | Revert r199628: "[AArch64 NEON] Fix a bug caused by undef lane when generatin... | Chandler Carruth | 2014-01-20 |
| * | [AArch64 NEON] Fix a bug caused by undef lane when generating VEXT. | Kevin Qin | 2014-01-20 |
| * | [AArch64 NEON] Accept both #0.0 and #0 for comparing with floating point zero... | Kevin Qin | 2014-01-20 |
| * | Move the retrieval of VT after all of the early exits from PerformOrCombine t... | Michael Gottesman | 2014-01-19 |
| * | ARM ELF: ensure that the tag types are corrected | Saleem Abdulrasool | 2014-01-19 |
| * | ARM: update build attributes for ABI r2.09 | Saleem Abdulrasool | 2014-01-19 |
| * | Move ARM build attributes into Support | Saleem Abdulrasool | 2014-01-19 |
| * | ARM IAS: remove unnecessary special case | Saleem Abdulrasool | 2014-01-19 |
| * | ARM: Let the assembler reject v5 instructions in v4 mode. | Benjamin Kramer | 2014-01-18 |
| * | Add two new calling conventions for runtime calls | Juergen Ributzka | 2014-01-17 |
| * | [mips][msa] Correct pattern for LSA | Daniel Sanders | 2014-01-17 |
| * | [mips] Split IIIdiv int II_DIV, II_DIVU, II_DDIV, and II_DDIVU | Daniel Sanders | 2014-01-17 |
| * | [mips][sched] Split IIImul and IIImult into subclasses. | Daniel Sanders | 2014-01-17 |
| * | [mips][sched] Split IIHiLo into II_MFHI_MFLO and II_MTHI_MTLO | Daniel Sanders | 2014-01-17 |
| * | Add MLA alias for ARMv4 support. | Renato Golin | 2014-01-17 |
| * | [AArch64 NEON] Expand vector for UDIV/SDIV/UREM/SREM/FREM as neon doesn't sup... | Kevin Qin | 2014-01-17 |
| * | Switch a few instructions to use RI instead I so they don't require REX_W to ... | Craig Topper | 2014-01-17 |
| * | Add OpSize16 flags to 32-bit CRC32 instructions so they can be encoded correc... | Craig Topper | 2014-01-17 |
| * | Teach x86 asm parser to handle 'opaque ptr' in Intel syntax. | Craig Topper | 2014-01-17 |
| * | Teach X86 asm parser to understand 'ZMMWORD PTR' in Intel syntax. | Craig Topper | 2014-01-17 |
| * | Fix intel syntax for 64-bit version of FXSAVE/FXRSTOR to use '64' suffix inst... | Craig Topper | 2014-01-17 |
| * | VEX_PREFIX_66 doesn't need to set the hasOpSize flag since VEX instructions d... | Craig Topper | 2014-01-17 |
| * | Replace duplicated code with a existing helper function. | Craig Topper | 2014-01-17 |
| * | [AArch64]Fix the problem can't select f16_to_f32 and f32_to_f16. | Hao Liu | 2014-01-17 |
| * | [AArch64 NEON] Custom lower conversion between vector integer and vector floa... | Kevin Qin | 2014-01-17 |
| * | [AArch64]Fix the problem can't select concat_vectors of two v1i32 types. | Hao Liu | 2014-01-17 |
| * | [mips][sched] Removed IIXfer. No instructions use it. | Daniel Sanders | 2014-01-16 |
| * | [mips][sched] Put AND, OR, XOR, MOVT_I, and MOVF_I in the same itinerary clas... | Daniel Sanders | 2014-01-16 |
| * | Add an emitRawComment function and use it to simplify some uses of EmitRawText. | Rafael Espindola | 2014-01-16 |
| * | [mips][sched] Split IIseb into II_SEB and II_SEH | Daniel Sanders | 2014-01-16 |
| * | [mips][sched] Split IILogic into II_AND, II_OR, II_XOR, II_ANDI, II_ORI, II_XORI | Daniel Sanders | 2014-01-16 |
| * | [mips][sched] Split IIArith in preparation for the first scheduler targeting ... | Daniel Sanders | 2014-01-16 |
| * | [mips] Correct itin class for MULT_MM and MULTu_MM to IIImult. | Daniel Sanders | 2014-01-16 |
| * | [mips] IIImult should have an InstrItinData in the generic scheduler. Used th... | Daniel Sanders | 2014-01-16 |
| * | For ARM, fix assertuib failures for some ld/st 3/4 instruction with wirteback. | Jiangning Liu | 2014-01-16 |
| * | AVX-512: fixed a compare pattern | Elena Demikhovsky | 2014-01-16 |
| * | Copy segment register when optimizing to MOV8ao8/MOV16ao16/MOV32ao32. | Craig Topper | 2014-01-16 |
| * | Allow x86 mov instructions to/from memory with absolute address to be encoded... | Craig Topper | 2014-01-16 |
| * | CommentColumn is always 40. Simplify. | Rafael Espindola | 2014-01-16 |
| * | Remove use of OpSize for populating VEX_PP field. A prefix encoding is now us... | Craig Topper | 2014-01-16 |
| * | Adjust offsets for max load instruction offsets. This is more pessimistic | Reed Kotler | 2014-01-16 |
