| Commit message (Expand) | Author | Age |
|---|
| * | Added the following 32-bit Thumb instructions for disassembly only: SMC, RFE, | Johnny Chen | 2010-02-25 |
| * | Added the 32-bit Thumb instructions (BXJ) for disassembly only. | Johnny Chen | 2010-02-25 |
| * | Added the 32-bit Thumb instructions (MRS and MSR) for disassembly only. | Johnny Chen | 2010-02-25 |
| * | Fix TextAlignFillValue in a few places | Daniel Dunbar | 2010-02-25 |
| * | Added the following 16-bit Thumb instructions for disassembly only: YIELD, WFE, | Johnny Chen | 2010-02-25 |
| * | Revert r97064. Duncan pointed out that bitcasts are defined in | Dan Gohman | 2010-02-25 |
| * | Each field of auxiliary debug entry is only 1 byte long. | Sanjiv Gupta | 2010-02-25 |
| * | Added tNOP for disassembly only. | Johnny Chen | 2010-02-25 |
| * | Truncate from i64 to i32 is "free" on x86-32, because it involves | Dan Gohman | 2010-02-25 |
| * | Revert this patch for the time being. Needs more testing. | Scott Michel | 2010-02-25 |
| * | Added tSVC and tTRAP for disassembly only. | Johnny Chen | 2010-02-25 |
| * | Large stack frame patch for the CellSPU: handle stack frames that exceed 8176 | Scott Michel | 2010-02-25 |
| * | Create a stack frame on ARM when | Jakob Stoklund Olesen | 2010-02-24 |
| * | Check for comparisons of +/- zero when optimizing less-than-or-equal and | Bob Wilson | 2010-02-24 |
| * | Make getTypeSizeInBits work correctly for array types; it should return | Dan Gohman | 2010-02-24 |
| * | Adding function "lookupGCCName" to MBlazeIntrinsicInfo | Wesley Peck | 2010-02-24 |
| * | Added Vector Swap (VSWPd and VSWPq) instructions for disassembly only. | Johnny Chen | 2010-02-24 |
| * | Stay away from str <undef> in ARMLoadStoreOpt. This pass does not understand | Jakob Stoklund Olesen | 2010-02-24 |
| * | Fixed typo of opcodestr, should be "vst1", not "vld1". | Johnny Chen | 2010-02-24 |
| * | Speculatively revert r97011, "Re-apply 96540 and 96556 with fixes.", again in | Daniel Dunbar | 2010-02-24 |
| * | When forming SSE min and max nodes for UGE and ULE comparisons, it's | Dan Gohman | 2010-02-24 |
| * | Remove an unused variable. Was this intentional? | Chandler Carruth | 2010-02-24 |
| * | Added for disassembly VST1 (multiple single elements) which stores elements to | Johnny Chen | 2010-02-24 |
| * | handle very large call frames when require SPAdj != 0 for Thumb1 | Jim Grosbach | 2010-02-24 |
| * | LowerCall() should always do getCopyFromReg() to reference the stack pointer. | Jim Grosbach | 2010-02-24 |
| * | Re-apply 96540 and 96556 with fixes. | Evan Cheng | 2010-02-24 |
| * | DIV8r must define %AX since X86DAGToDAGISel::Select() sometimes uses it | Jakob Stoklund Olesen | 2010-02-24 |
| * | Fix rev 96389 by restricting the xform to mask that's either signbit or max s... | Evan Cheng | 2010-02-23 |
| * | Don't mark call instruction as a barrier. | Richard Osborne | 2010-02-23 |
| * | Added for disassembly VLD1 (multiple single elements) which loads memory into | Johnny Chen | 2010-02-23 |
| * | Use the module's context instead of the global context. | Nicolas Geoffray | 2010-02-23 |
| * | no need to override IsLegalToFold, the base implementation | Chris Lattner | 2010-02-23 |
| * | Adding the MicroBlaze backend. | Wesley Peck | 2010-02-23 |
| * | ECALLF, ECALLT shouldn't be marked as barriers. | Richard Osborne | 2010-02-23 |
| * | Mark unconditional branches as barriers. Found using -verify-machineinstrs | Richard Osborne | 2010-02-23 |
| * | Spelling. s/suppor /support / | Jim Grosbach | 2010-02-23 |
| * | Remove unused lowering function LowerJumpTable | Richard Osborne | 2010-02-23 |
| * | Lower BR_JT on the XCore to a jump into a series of jump instructions. | Richard Osborne | 2010-02-23 |
| * | disable two patterns that are using non-sensical result pattern types. | Chris Lattner | 2010-02-23 |
| * | remove a confused pattern that is trying to match an address | Chris Lattner | 2010-02-23 |
| * | remove a bunch of dead named arguments in input patterns, | Chris Lattner | 2010-02-23 |
| * | fix a type mismatch in this pattern, where we were using an i64 imm in a | Chris Lattner | 2010-02-23 |
| * | reapply my cellspu changes with a fix to not break the old isel. | Chris Lattner | 2010-02-23 |
| * | Revert 96854, 96852, and 96849, unbreaking test/CodeGen/CellSPU/i64ops.ll. | Dan Gohman | 2010-02-23 |
| * | X86InstrInfoSSE.td declares PINSRW as having type v8i16, | Chris Lattner | 2010-02-23 |
| * | Added versions of VCGE, VCGT, VCLE, and VCLT NEON instructions which compare to | Johnny Chen | 2010-02-23 |
| * | fix hte last cellspu failure. | Chris Lattner | 2010-02-23 |
| * | hack around more crimes in instruction selection. | Chris Lattner | 2010-02-23 |
| * | the cell backend is making all sorts of unsafe and incorrect assumptions | Chris Lattner | 2010-02-23 |
| * | Added VCEQ (immediate #0) NEON instruction for disassembly only. | Johnny Chen | 2010-02-23 |
