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* Thumb MUL assembly parsing for 3-operand form.Jim Grosbach2011-11-10
* build/MBlazeDisassembler: Some compilers may generate an MBlaze disassemblerDaniel Dunbar2011-11-10
* When in ARM mode, LDRH/STRH require special handling of negative offsets.Chad Rosier2011-11-10
* ARM .thumb_func directive for quoted symbol names.Jim Grosbach2011-11-10
* ARM assembly parsing for LSR/LSL/ROR(immediate).Jim Grosbach2011-11-10
* ARM assembly parsing for ASR(immediate).Jim Grosbach2011-11-10
* build: Rename CBackend and CppBackend libraries to have CodeGen suffix, forDaniel Dunbar2011-11-10
* AVX2: Add variable shift from memory.Nadav Rotem2011-11-10
* For immediate encodings of icmp, zero or sign extend first. ThenChad Rosier2011-11-10
* build/Make & CMake: Pass the appropriate --native-target and --enable-targetsDaniel Dunbar2011-11-10
* llvm-build: Add --native-target and --enable-targets options, and add logic toDaniel Dunbar2011-11-10
* llvm-build: Change CBackend and CppBackend to not use library_name. This willDaniel Dunbar2011-11-10
* llvm-build: Add an explicit component type to represent targets.Daniel Dunbar2011-11-10
* Tidy up.Jim Grosbach2011-11-10
* Thumb2 assembly parsing STMDB w/ optional .w suffix.Jim Grosbach2011-11-09
* Make sure we correctly unroll conversions between v2f64 and v2i32 on ARM.Eli Friedman2011-11-09
* The ARM LDRH/STRH instructions use a +/-imm8 encoding, not an imm12.Chad Rosier2011-11-09
* AVX2: Add patterns for variable shift operationsNadav Rotem2011-11-09
* Remove unnecessary include.Devang Patel2011-11-09
* Add AVX2 support for vselect of v32i8Nadav Rotem2011-11-09
* Enable execution dependency fix pass for YMM registers when AVX2 is enabled. ...Craig Topper2011-11-09
* Add instruction selection for AVX2 integer comparisons.Craig Topper2011-11-09
* Add AVX2 instruction lowering for add, sub, and mul.Craig Topper2011-11-09
* Add support for encoding immediates in icmp and fcmp. Hopefully, this willChad Rosier2011-11-09
* Hide cpu name checking in ARMSubtarget.Evan Cheng2011-11-09
* Properly handle Mips MC relocations and lower cpload and cprestore macros to ...Bruno Cardoso Lopes2011-11-08
* Add workaround for Cortex-M3 errata 602117 by replacing ldrd x, y, [x] with l...Evan Cheng2011-11-08
* ARMFastISel doesn't support thumb1. Rename isThumb to isThumb2 to reflect this.Chad Rosier2011-11-08
* Lower mem-ops to unaligned i32/i16 load/stores on ARM where supported.Lang Hames2011-11-08
* Added invariant field to the DAG.getLoad method and changed all calls.Pete Cooper2011-11-08
* This patch handles unaligned loads and stores in Mips JIT. Mips backendBruno Cardoso Lopes2011-11-08
* PPCInstrInfo.cpp: Fix one "unused" warning.NAKAMURA Takumi2011-11-08
* Make sure to mark vector extload's as expand on ARM. Fixes PR11319.Eli Friedman2011-11-08
* Add x86 isel logic and patterns to match movlps from clang generated IR for _...Evan Cheng2011-11-08
* Enable support for returning i1, i8, and i16. Nothing special todo as it's theChad Rosier2011-11-08
* Allow i1 to be promoted to i32 for ARM AAPCS and AAPCS-VFP calling convention...Chad Rosier2011-11-07
* Various Mips64 floating point instruction patterns.Akira Hatanaka2011-11-07
* Add definition of the base class for floating point comparison instructionsAkira Hatanaka2011-11-07
* Add code needed for copying between 64-bit integer and floating pointerAkira Hatanaka2011-11-07
* Add definitions of 64-bit instructions which move data between integer andAkira Hatanaka2011-11-07
* Simplify some uses of utohexstr.Benjamin Kramer2011-11-07
* Simplify code. No functionality change.Benjamin Kramer2011-11-07
* Expand V_SET0 to xorps by default.Jakob Stoklund Olesen2011-11-07
* Add definition of 64-bit load upper immediate.Akira Hatanaka2011-11-07
* Include RegSaveAreaSize in the computation of stack size.Akira Hatanaka2011-11-07
* Define functions that get or set the size of area on callee's stack frame whichAkira Hatanaka2011-11-07
* Use array_lengthof to compute the number of iterations of a loop.Akira Hatanaka2011-11-07
* Fix patterns for unaligned 32-bit load. DSLL32 or DSRL32 should be emittedAkira Hatanaka2011-11-07
* Make the type of shift amount i32 in order to reduce the number of shiftAkira Hatanaka2011-11-07
* Add 64-bit to 32-bit trunc pattern.Akira Hatanaka2011-11-07