| Commit message (Expand) | Author | Age |
|---|
| * | Modify LowerFRAMEADDR. Use 64-bit register FP_64 when ABI is N64. | Akira Hatanaka | 2011-11-11 |
| * | Add 64-bit versions of LEA_ADDiu and DynAlloc. Modify LowerDYNAMIC_STACKALLOC. | Akira Hatanaka | 2011-11-11 |
| * | 64-bit versions of jal, jalr and bal. | Akira Hatanaka | 2011-11-11 |
| * | Emit Mips64's sequence of instructions that set global register in prologue. | Akira Hatanaka | 2011-11-11 |
| * | Fix printing of MCSymbolRegExpr. Needs three closing parentheses for | Akira Hatanaka | 2011-11-11 |
| * | Make sure to expand SIGN_EXTEND_INREG for NEON vectors. PR11319, round 3. | Eli Friedman | 2011-11-11 |
| * | When loading a value, treat an i1 as an i8. | Chad Rosier | 2011-11-11 |
| * | If we have to reset the calculation of the compact encoding, then also reset the | Bill Wendling | 2011-11-11 |
| * | Add support for using MVN to materialize negative constants. | Chad Rosier | 2011-11-11 |
| * | LLVMBuild: Add explicit information on whether targets define an assembly pri... | Daniel Dunbar | 2011-11-11 |
| * | Thumb2 ldm/stm updating w/ one register in the list are LDR/STR. | Jim Grosbach | 2011-11-10 |
| * | ARM let processInstruction() tranforms chain. | Jim Grosbach | 2011-11-10 |
| * | Thumb2 parsing for push/pop w/ hi registers in the reglist. | Jim Grosbach | 2011-11-10 |
| * | Thumb1 diagnostics for reglist on PUSH/POP fix. | Jim Grosbach | 2011-11-10 |
| * | Thumb MUL assembly parsing for 3-operand form. | Jim Grosbach | 2011-11-10 |
| * | build/MBlazeDisassembler: Some compilers may generate an MBlaze disassembler | Daniel Dunbar | 2011-11-10 |
| * | When in ARM mode, LDRH/STRH require special handling of negative offsets. | Chad Rosier | 2011-11-10 |
| * | ARM .thumb_func directive for quoted symbol names. | Jim Grosbach | 2011-11-10 |
| * | ARM assembly parsing for LSR/LSL/ROR(immediate). | Jim Grosbach | 2011-11-10 |
| * | ARM assembly parsing for ASR(immediate). | Jim Grosbach | 2011-11-10 |
| * | build: Rename CBackend and CppBackend libraries to have CodeGen suffix, for | Daniel Dunbar | 2011-11-10 |
| * | AVX2: Add variable shift from memory. | Nadav Rotem | 2011-11-10 |
| * | For immediate encodings of icmp, zero or sign extend first. Then | Chad Rosier | 2011-11-10 |
| * | build/Make & CMake: Pass the appropriate --native-target and --enable-targets | Daniel Dunbar | 2011-11-10 |
| * | llvm-build: Add --native-target and --enable-targets options, and add logic to | Daniel Dunbar | 2011-11-10 |
| * | llvm-build: Change CBackend and CppBackend to not use library_name. This will | Daniel Dunbar | 2011-11-10 |
| * | llvm-build: Add an explicit component type to represent targets. | Daniel Dunbar | 2011-11-10 |
| * | Tidy up. | Jim Grosbach | 2011-11-10 |
| * | Thumb2 assembly parsing STMDB w/ optional .w suffix. | Jim Grosbach | 2011-11-09 |
| * | Make sure we correctly unroll conversions between v2f64 and v2i32 on ARM. | Eli Friedman | 2011-11-09 |
| * | The ARM LDRH/STRH instructions use a +/-imm8 encoding, not an imm12. | Chad Rosier | 2011-11-09 |
| * | AVX2: Add patterns for variable shift operations | Nadav Rotem | 2011-11-09 |
| * | Remove unnecessary include. | Devang Patel | 2011-11-09 |
| * | Add AVX2 support for vselect of v32i8 | Nadav Rotem | 2011-11-09 |
| * | Enable execution dependency fix pass for YMM registers when AVX2 is enabled. ... | Craig Topper | 2011-11-09 |
| * | Add instruction selection for AVX2 integer comparisons. | Craig Topper | 2011-11-09 |
| * | Add AVX2 instruction lowering for add, sub, and mul. | Craig Topper | 2011-11-09 |
| * | Add support for encoding immediates in icmp and fcmp. Hopefully, this will | Chad Rosier | 2011-11-09 |
| * | Hide cpu name checking in ARMSubtarget. | Evan Cheng | 2011-11-09 |
| * | Properly handle Mips MC relocations and lower cpload and cprestore macros to ... | Bruno Cardoso Lopes | 2011-11-08 |
| * | Add workaround for Cortex-M3 errata 602117 by replacing ldrd x, y, [x] with l... | Evan Cheng | 2011-11-08 |
| * | ARMFastISel doesn't support thumb1. Rename isThumb to isThumb2 to reflect this. | Chad Rosier | 2011-11-08 |
| * | Lower mem-ops to unaligned i32/i16 load/stores on ARM where supported. | Lang Hames | 2011-11-08 |
| * | Added invariant field to the DAG.getLoad method and changed all calls. | Pete Cooper | 2011-11-08 |
| * | This patch handles unaligned loads and stores in Mips JIT. Mips backend | Bruno Cardoso Lopes | 2011-11-08 |
| * | PPCInstrInfo.cpp: Fix one "unused" warning. | NAKAMURA Takumi | 2011-11-08 |
| * | Make sure to mark vector extload's as expand on ARM. Fixes PR11319. | Eli Friedman | 2011-11-08 |
| * | Add x86 isel logic and patterns to match movlps from clang generated IR for _... | Evan Cheng | 2011-11-08 |
| * | Enable support for returning i1, i8, and i16. Nothing special todo as it's the | Chad Rosier | 2011-11-08 |
| * | Allow i1 to be promoted to i32 for ARM AAPCS and AAPCS-VFP calling convention... | Chad Rosier | 2011-11-07 |
