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* Use GetUnderlyingObject instead of custom functionMatt Arsenault2013-06-18
* ARM: Add optional datatype suffix to NEON mvn asm syntax.Jim Grosbach2013-06-18
* [ARMTargetLowering] ARMISD::{SUB,ADD}{C,E} second result is a boolean implyin...Michael Gottesman2013-06-18
* Converted an overly aggressive assert to a conditional check in AddCombineTo6...Michael Gottesman2013-06-18
* Fix 80 col violation.Nadav Rotem2013-06-18
* Change the arm assembler to support this from the v7c spec:Kevin Enderby2013-06-18
* Mips ELF: Mark object file as ABI compliant Jack Carter2013-06-18
* Reduce indentation.David Blaikie2013-06-18
* Add support for encoding the HLE XACQUIRE and XRELEASE prefixes.Stefanus Du Toit2013-06-18
* ARM: fix literal load with positive offset encodingAmaury de la Vieuville2013-06-18
* ARM: add operands pre-writeback variants when neededAmaury de la Vieuville2013-06-18
* ARM: fix thumb literal loads decodingAmaury de la Vieuville2013-06-18
* ARM: thumb stores cannot use PC as dest registerAmaury de la Vieuville2013-06-18
* Use pointers to the MCAsmInfo and MCRegInfo.Bill Wendling2013-06-18
* Remove dead prototype.Bill Wendling2013-06-18
* R600: PV stores Reg id, not indexVincent Lejeune2013-06-17
* R600: Properly set COUNT_3 bit in TEX clause initiating inst for pre EG gen.Vincent Lejeune2013-06-17
* DebugInfo: remove target-specific Frame Index handling for DBG_VALUE MachineI...David Blaikie2013-06-16
* Debug Info: Simplify Frame Index handling in DBG_VALUE Machine InstructionsDavid Blaikie2013-06-16
* Support BufferSize on ProcResGroup for unified MOp schedulers.Andrew Trick2013-06-15
* Update machine models. Specify buffer sizes for OOO processors.Andrew Trick2013-06-15
* Machine Model: Add MicroOpBufferSize and resource BufferSize.Andrew Trick2013-06-15
* R600: Add SI load support for v[24]i32 and store for v2i32Tom Stellard2013-06-15
* R600: Use correct encoding for Vertex Fetch instructions on CaymanTom Stellard2013-06-14
* R600: Use EXPORT_RAT_INST_STORE_DWORD for stores on CaymanTom Stellard2013-06-14
* R600: Factor the instruction encoding out the RAT_WRITE_CACHELESS_eg classTom Stellard2013-06-14
* R600: Move instruction encoding definitions into a separate .td fileTom Stellard2013-06-14
* ARM: fix thumb coprocessor instruction with pre-writeback disassemblyAmaury de la Vieuville2013-06-14
* X86: cvtpi2ps is just an SSE instruction with MMX operands. It has no AVX equ...Benjamin Kramer2013-06-14
* Enable FastISel on ARM for Linux and NaCl, not MCJITJF Bastien2013-06-14
* R600: Don't try to fix reg class when copying IMPLICIT_DEF to a registerTom Stellard2013-06-13
* Mips: Remove global set.Benjamin Kramer2013-06-13
* ARM: fix B decodingAmaury de la Vieuville2013-06-13
* ARM: fix t2am_imm8_offset operand printing for imm=#-0Amaury de la Vieuville2013-06-13
* X86: Make the cmov aliases work with intel syntax too.Benjamin Kramer2013-06-13
* Revert r183854 (PPC: Fix switch warnings from r183841)David Blaikie2013-06-12
* [PowerPC] Remove PRED_BAD from PPC::Predicate enumeration.Bill Schmidt2013-06-12
* [PowerPC] Fix switch warnings from r183841.Bill Schmidt2013-06-12
* [PowerPC] Expose some calling convention functions in PPCISelLowering.h.Bill Schmidt2013-06-12
* Add artificial PRED_BAD to PPC::Predicate enumeration.Bill Schmidt2013-06-12
* [MC/DWARF] Support .debug_frame / .debug_line code alignment factorsUlrich Weigand2013-06-12
* Fix gcc -flto build, by adding LLVM_ATTRIBUTE_USED toPatrik Hagglund2013-06-12
* Correct the def registers for the 8bit x86 divide instructions toEric Christopher2013-06-11
* Use the Copy we defined above here.Eric Christopher2013-06-11
* Fix CMakeLists.Akira Hatanaka2013-06-11
* [mips] Add an IR transformation pass that optimizes calls to sqrt.Akira Hatanaka2013-06-11
* ARM FastISel fix sext/zext foldJF Bastien2013-06-11
* [mips] Use function TargetInstrInfo::getRegClass.Akira Hatanaka2013-06-11
* R600: Make helper functions static.Benjamin Kramer2013-06-11
* Rework r183728, suppress assert(0) for now. Its behavior depends on assertion...NAKAMURA Takumi2013-06-11