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* This is now implemented.Benjamin Kramer2011-12-09
* X86: Add patterns for the various rounding ops for SSE4.1 and AVX.Benjamin Kramer2011-12-09
* X86: Split (v)rounds[sd] into a normal and an intrinsic version.Benjamin Kramer2011-12-09
* Move isUnpredicatedTerminator() default implementation to TargetInstrInfoImpl...Evan Cheng2011-12-09
* Remove hasSSE1orAVX(). It's the same as hasXMM().Evan Cheng2011-12-09
* Rename WrapperPIC. It is now used for both pic and static.Akira Hatanaka2011-12-09
* jalr should use t9 ($25) for indirect calls regardless of the relocation modelAkira Hatanaka2011-12-09
* ARM convenience aliases for VSQRT.Jim Grosbach2011-12-08
* Add 256-bit variant vmovss and vmovsd patterns. rdar://10538417Evan Cheng2011-12-08
* ARM 64-bit VEXT assembly uses a .64 suffix, not .32, amazingly enough.Jim Grosbach2011-12-08
* Enhance both TargetLibraryInfo and SelectionDAGBuilder so that the latter can...Owen Anderson2011-12-08
* ARM VSHR implied destination operand form aliases.Jim Grosbach2011-12-08
* Add various missing AVX patterns which was causing crashes. Sadly, the generatedEvan Cheng2011-12-08
* ARM asm parser, just issue a warning for a duplicate reg in a list.Jim Grosbach2011-12-08
* Pass a GlobalAddress instead of an ExternalSymbol to LowerCallTo inAkira Hatanaka2011-12-08
* ARM VSUB implied destination operand form aliases.Jim Grosbach2011-12-08
* Don't explicitly marked libm rounding ops as legal on SSE4.1/AVX. There don'...Owen Anderson2011-12-08
* ARM VQADD implied destination operand form aliases.Jim Grosbach2011-12-08
* ARM a few more VMUL implied destination operand form aliases.Jim Grosbach2011-12-08
* Implement 64-bit support for thread local storage handling.Akira Hatanaka2011-12-08
* Teach SelectionDAG to match more calls to libm functions onto existing SDNode...Owen Anderson2011-12-08
* ARM assembler support for register name aliases.Jim Grosbach2011-12-08
* Many of the SSE patterns should not be selected when AVX is available. This l...Evan Cheng2011-12-08
* Revert r146143, "Fix bug 9905: Failure in code selection for llvm intrinsicsDaniel Dunbar2011-12-08
* Src2 and src3 were accidentally swapped for the FMA4 rr patterns. Undo this a...Jan Sjödin2011-12-08
* Fix bug 9905: Failure in code selection for llvm intrinsics sqrt/exp (fix for...Stepan Dyatkovskiy2011-12-08
* MTCTR needs to be glued to BCTR so that CTR is not marked dead in MTCTR (anot...Hal Finkel2011-12-08
* ARM NEON two-operand aliases for VSHL(immediate).Jim Grosbach2011-12-08
* Drop the HasInlineAsm flag.Jakob Stoklund Olesen2011-12-08
* ARM NEON two-operand aliases for VSHL(register).Jim Grosbach2011-12-08
* Simplify offset verification.Jakob Stoklund Olesen2011-12-08
* Fix copy/past-o.Jim Grosbach2011-12-08
* ARM NEON two-operand aliases for VMUL.Jim Grosbach2011-12-08
* Don't include alignment padding in BBInfo.Size.Jakob Stoklund Olesen2011-12-08
* ARM VFP support 'fmrs/fmsr' aliases for 'vldr'Jim Grosbach2011-12-08
* ARM VFP support 'flds/fldd' aliases for 'vldr'Jim Grosbach2011-12-08
* ARM optional destination operand variants for VEXT instructions.Jim Grosbach2011-12-08
* ARM assembler aliases for "add Rd, #-imm" to "sub Rd, #imm".Jim Grosbach2011-12-08
* ARM assembly, allow 'asl' as a synonym for 'lsl' in shifted-register operands.Jim Grosbach2011-12-07
* Modify class ReadHardware and add definition of 64-bit version of instructionAkira Hatanaka2011-12-07
* Add newline.Akira Hatanaka2011-12-07
* Add 64-bit HWR29 register.Akira Hatanaka2011-12-07
* 32 to 64-bit anyext pattern.Akira Hatanaka2011-12-07
* 32 to 64-bit zext pattern.Akira Hatanaka2011-12-07
* ARM two-operand aliases for VAND/VEOR/VORR instructions.Jim Grosbach2011-12-07
* ARM two-operand aliases for VADDW instructions.Jim Grosbach2011-12-07
* ARM two-operand aliases for VADD instructions.Jim Grosbach2011-12-07
* Variable cleanup. Based on past patch submittals variable names haveBruno Cardoso Lopes2011-12-07
* 64-bit WrapperPICPat patterns.Akira Hatanaka2011-12-07
* Define base class for WrapperPICPat.Akira Hatanaka2011-12-07
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