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* [mips][mips64r6] madd.[ds], msub.[ds], nmadd.[ds], and nmsub.[ds] are not ava...Daniel Sanders2014-06-12
* [mips][mips64r6] madd/maddu/msub/msubu are not available on MIPS32r6/MIPS64r6Daniel Sanders2014-06-12
* [X86] Teach how to combine AVX and AVX2 horizontal binop on packed 256-bit ve...Andrea Di Biagio2014-06-12
* [mips][mips64r6] Replace m[tf]hi, m[tf]lo, mult, multu, dmult, dmultu, div, d...Daniel Sanders2014-06-12
* R600/SI: Use a register set to -1 for data0 on ds_inc*/ds_dec*Matt Arsenault2014-06-12
* [FastISel][X86] Add support for the sqrt intrinsic.Juergen Ributzka2014-06-11
* [FastIsel][X86] Add support for lowering the first 8 floating-point arguments.Juergen Ributzka2014-06-11
* [FastISel][X86] Add support for the frameaddress intrinsic.Juergen Ributzka2014-06-11
* [AArch64] Basic Sched Model for Cortex-A57.Chad Rosier2014-06-11
* R600: Set correct InstrItinClass for instructions using *Helper classesTom Stellard2014-06-11
* R600: BCNT_INT is a vector only instructionTom Stellard2014-06-11
* ARM: honor hex immediate formatting for ldr/str i12 offsets.Jim Grosbach2014-06-11
* R600/SI: Fix bitcast between v2i32 and f64Matt Arsenault2014-06-11
* R600/SI: Update place using old subtarget predicateMatt Arsenault2014-06-11
* R600/SI: Add common 64-bit LDS atomicsMatt Arsenault2014-06-11
* R600/SI: Add instruction definitions for 64-bit LDS atomicsMatt Arsenault2014-06-11
* R600/SI: Add 32-bit LDS atomic cmpxchgMatt Arsenault2014-06-11
* R600/SI: Use LDS atomic inc / decMatt Arsenault2014-06-11
* R600/SI: Add other LDS atomic operationsMatt Arsenault2014-06-11
* R600/SI: Add instruction definitions for more LDS opsMatt Arsenault2014-06-11
* R600/SI: Fix backwards names for local atomic instructions.Matt Arsenault2014-06-11
* R600/SI: Refactor local atomics.Matt Arsenault2014-06-11
* R600/SI: Use v_cvt_f32_ubyte* instructionsMatt Arsenault2014-06-11
* R600/SI: Fix selection failure on scalar_to_vectorMatt Arsenault2014-06-11
* X86: add stringy name for X86ISD::LCMPXCHG16_DAGTim Northover2014-06-11
* [mips] Implement jr.hb and jalr.hb (Jump Register and Jump and Link Register ...Matheus Almeida2014-06-11
* Add AVX512 masked leadz instrinsic support.Cameron McInally2014-06-11
* [X86] Refactor the logic to select horizontal adds/subs to a helper function.Andrea Di Biagio2014-06-11
* Try to fix the msvc build.Rafael Espindola2014-06-11
* Use cast instead of assert + dyn_castMatt Arsenault2014-06-11
* R600: Add helper functions.Matt Arsenault2014-06-11
* Remove duplicate copy of InstrItineraryData from the TargetMachine,Eric Christopher2014-06-11
* Move to a private function to initialize the subtarget dependenciesEric Christopher2014-06-11
* Move to a private function to initialize the subtarget dependenciesEric Christopher2014-06-11
* [FastISel][X86] Extend support for {s|u}{add|sub|mul}.with.overflow intrinsics.Juergen Ributzka2014-06-10
* Use unique_ptr for X86Subtarget pointer members.Eric Christopher2014-06-10
* Move AArch64TargetLowering to AArch64Subtarget.Eric Christopher2014-06-10
* Move AArch64InstrInfo to AArch64Subtarget.Eric Christopher2014-06-10
* Remove a method that was just replacing direct access to a member.Eric Christopher2014-06-10
* Remove the use of TargetMachine from X86InstrInfo.Eric Christopher2014-06-10
* Move X86RegisterInfo away from using the TargetMachine and onlyEric Christopher2014-06-10
* Use the TargetMachine on the DAG or the MachineFunction insteadEric Christopher2014-06-10
* R600/SI: Emit an error when attempting to spill VGPRs v4Tom Stellard2014-06-10
* R600/SI: Fix a crash when spilling SGPRsTom Stellard2014-06-10
* R600: Use BCNT_INT for evergreenMatt Arsenault2014-06-10
* R600/SI: Implement i64 ctpopMatt Arsenault2014-06-10
* R600/SI: Use bcnt instruction for ctpopMatt Arsenault2014-06-10
* R600: Handle fcopysignMatt Arsenault2014-06-10
* R600/SI: Handle sign_extend and zero_extend to i64 with patterns.Matt Arsenault2014-06-10
* Add a FIXME.Eric Christopher2014-06-10