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* Implement PIC for arm-linux.Lauro Ramos Venancio2007-04-22
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36324 91177308-0d34-0410-b5e6-96231b3b80d8
* X86 TLS: Implement review feedback.Lauro Ramos Venancio2007-04-21
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36318 91177308-0d34-0410-b5e6-96231b3b80d8
* Comment out usage of write() for now.Jeff Cohen2007-04-20
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36287 91177308-0d34-0410-b5e6-96231b3b80d8
* Implement "general dynamic", "initial exec" and "local exec" TLS models forLauro Ramos Venancio2007-04-20
| | | | | | | X86 32 bits. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36283 91177308-0d34-0410-b5e6-96231b3b80d8
* Specify S registers as D registers' sub-registers.Evan Cheng2007-04-20
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* Specify sub-register relations. e.g. RAX: [EAX], EAX: [AX], AX: [AL,AH].Evan Cheng2007-04-20
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* Add sub-registers sets.Evan Cheng2007-04-20
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* add a crazy ideaChris Lattner2007-04-20
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* Make Microsoft assembler and linker happy.Jeff Cohen2007-04-20
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36265 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix a message, patch by Christopher Lamb.Chris Lattner2007-04-19
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36264 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix a bug in getFrameRegister.Lauro Ramos Venancio2007-04-19
| | | | | | | Reported by Raul Herbster. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36262 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix the spelling of the prefetchnta instruction.Dan Gohman2007-04-18
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36256 91177308-0d34-0410-b5e6-96231b3b80d8
* Oops. Didn't mean to check in a quick hack.Evan Cheng2007-04-17
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36227 91177308-0d34-0410-b5e6-96231b3b80d8
* dag combiner just got better at pruning bits. This fixes CodeGen/ARM/rev.llChris Lattner2007-04-17
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36222 91177308-0d34-0410-b5e6-96231b3b80d8
* Change getAllocatableSet() so it returns allocatable registers for a ↵Evan Cheng2007-04-17
| | | | | | specific register class. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36215 91177308-0d34-0410-b5e6-96231b3b80d8
* Add commentAnton Korobeynikov2007-04-17
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36213 91177308-0d34-0410-b5e6-96231b3b80d8
* add a noteChris Lattner2007-04-17
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36203 91177308-0d34-0410-b5e6-96231b3b80d8
* rename X86FunctionInfo to X86MachineFunctionInfo to match the header fileChris Lattner2007-04-17
| | | | | | | it is defined in. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36196 91177308-0d34-0410-b5e6-96231b3b80d8
* Implemented correct stack probing on mingw/cygwin for dynamic alloca's.Anton Korobeynikov2007-04-17
| | | | | | | | | Also, fixed static case in presence of eax livin. This fixes PR331 PS: Why don't we still have push/pop instructions? :) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36195 91177308-0d34-0410-b5e6-96231b3b80d8
* Use this nifty Constraints thing and fix the inverted conditional movesAndrew Lenharth2007-04-17
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36191 91177308-0d34-0410-b5e6-96231b3b80d8
* SSE4 is apparently public now.Chris Lattner2007-04-17
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* In the event that some really old non-Intel or -AMD CPU is encountered...Jeff Cohen2007-04-16
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* Before assuming that the original code didn't work for Athlon64, the person whoJeff Cohen2007-04-16
| | | | | | | | replaced it with a FIXME should have determined what did work. Then he would have realized that the code was in fact correct, and would have avoided breaking it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36173 91177308-0d34-0410-b5e6-96231b3b80d8
* Removed tabs everywhere except autogenerated & external files. Add makeAnton Korobeynikov2007-04-16
| | | | | | | target for tabs checking. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36146 91177308-0d34-0410-b5e6-96231b3b80d8
* For PR1336:Reid Spencer2007-04-16
| | | | | | | | Subtarget option names must be given in lower case in order to be recognized. Fixes test/CodeGen/Alpha/ctlz.ll git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36125 91177308-0d34-0410-b5e6-96231b3b80d8
* add a noteChris Lattner2007-04-14
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36028 91177308-0d34-0410-b5e6-96231b3b80d8
* Silence VC++ warning.Jeff Cohen2007-04-13
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* arm has r+r*s and r+i addr modes, but no r+i+r*s addr modes.Chris Lattner2007-04-13
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* Implement review feedback .. don't double search a set.Reid Spencer2007-04-12
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35957 91177308-0d34-0410-b5e6-96231b3b80d8
* Provide support for intrinsics that lower themselves to a function body.Reid Spencer2007-04-12
| | | | | | | | | This can happen for intrinsics that are overloaded. In such cases it is necessary to emit a function prototype before the body of the function that calls the intrinsic and to ensure we don't emit it multiple times. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35954 91177308-0d34-0410-b5e6-96231b3b80d8
* Implement Thread Local Storage (TLS) in CBackend.Lauro Ramos Venancio2007-04-12
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* Fix mmx paddq, add support for the 'y' register class, though it isn't tested.Chris Lattner2007-04-12
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* Fix CodeGen/X86/2007-03-24-InlineAsmPModifier.llChris Lattner2007-04-11
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35926 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix incorrect fall-throughs in addr mode code. This fixes ↵Chris Lattner2007-04-11
| | | | | | CodeGen/ARM/arm-negative-stride.ll git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35909 91177308-0d34-0410-b5e6-96231b3b80d8
* doneChris Lattner2007-04-11
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35884 91177308-0d34-0410-b5e6-96231b3b80d8
* For PR1146:Reid Spencer2007-04-11
| | | | | | | | Put the parameter attributes in their own ParamAttr name space. Adjust the rest of llvm as a result. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35877 91177308-0d34-0410-b5e6-96231b3b80d8
* Add support for our first SSSE3 instruction "pmulhrsw".Bill Wendling2007-04-10
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35869 91177308-0d34-0410-b5e6-96231b3b80d8
* new micro optznChris Lattner2007-04-10
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35867 91177308-0d34-0410-b5e6-96231b3b80d8
* restore support for negative stridesChris Lattner2007-04-10
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35859 91177308-0d34-0410-b5e6-96231b3b80d8
* remove dead target hooksChris Lattner2007-04-09
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35846 91177308-0d34-0410-b5e6-96231b3b80d8
* remove some dead hooksChris Lattner2007-04-09
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35845 91177308-0d34-0410-b5e6-96231b3b80d8
* remove some dead target hooks, subsumed by isLegalAddressingModeChris Lattner2007-04-09
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35840 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix a bug in PPCTargetLowering::isLegalAddressingMode, scales other than 0/1/2Chris Lattner2007-04-09
| | | | | | | are always unsupported. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35835 91177308-0d34-0410-b5e6-96231b3b80d8
* When the number of elements is zero, don't malloc 32GB on 64-bit systems.Jeff Cohen2007-04-09
| | | | | | | | | | | Fixes unexpected failures on FreeBSD/amd64 of: CFrontend/2005-09-24-BitFieldCrash.c: CFrontend/2007-02-04-EmptyStruct.c: CFrontend/2007-03-26-ZeroWidthBitfield.c: CodeGen/Generic/2005-10-18-ZeroSizeStackObject.ll: git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35828 91177308-0d34-0410-b5e6-96231b3b80d8
* For PR1146:Reid Spencer2007-04-09
| | | | | | | Adapt handling of parameter attributes to use the new ParamAttrsList class. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35814 91177308-0d34-0410-b5e6-96231b3b80d8
* move a bunch of register constraints from being handled byChris Lattner2007-04-09
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | getRegClassForInlineAsmConstraint to being handled by getRegForInlineAsmConstraint. This allows us to let the llvm register allocator allocate, which gives us better code. For example, X86/2007-01-29-InlineAsm-ir.ll used to compile to: _run_init_process: subl $4, %esp movl %ebx, (%esp) xorl %ebx, %ebx movl $11, %eax movl %ebx, %ecx movl %ebx, %edx # InlineAsm Start push %ebx ; movl %ebx,%ebx ; int $0x80 ; pop %ebx # InlineAsm End Now we get: _run_init_process: xorl %ecx, %ecx movl $11, %eax movl %ecx, %edx # InlineAsm Start push %ebx ; movl %ecx,%ebx ; int $0x80 ; pop %ebx # InlineAsm End git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35804 91177308-0d34-0410-b5e6-96231b3b80d8
* implement support for CodeGen/X86/inline-asm-x-scalar.ll:test3 - i32/i64 valuesChris Lattner2007-04-09
| | | | | | | used with x constraints. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35803 91177308-0d34-0410-b5e6-96231b3b80d8
* implement CodeGen/X86/inline-asm-x-scalar.llChris Lattner2007-04-09
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35799 91177308-0d34-0410-b5e6-96231b3b80d8
* Squelch a warning about mismatch between sign of constant and sign of returnReid Spencer2007-04-04
| | | | | | | type. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35674 91177308-0d34-0410-b5e6-96231b3b80d8
* Implement inline asm modifier P.Evan Cheng2007-04-04
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35640 91177308-0d34-0410-b5e6-96231b3b80d8
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